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参数资料
| 型号： | 11AA161T-I/TT |
| 厂商： | Microchip Technology |
| 文件页数： | 15/44页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16K SER IND SOT23-3 |
| 标准包装： | 3,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 100kHz |
| 接口： | UNI/O?（单线） |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | TO-236-3，SC-59，SOT-23-3 |
| 供应商设备封装： | SOT-23-3 |
| 包装： | 带卷 (TR) |
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11AAXXX/11LCXXX
4.6 Write Status Register ( WRSR )
Instruction
The WRSR instruction allows the user to select one of
four levels of protection for the array by writing to the
appropriate bits in the STATUS register. The array is
divided up into four segments. The user has the ability
to write-protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 4-3.
After transmitting the STATUS register data, the master
must transmit a NoMAK during the Acknowledge
sequence in order to initiate the internal write cycle.
Note: The WRSR instruction must be termi-
nated with a NoMAK following the data
byte. If a NoMAK is not received at this
point, the command will be considered
invalid, and the device will go into Idle
mode without responding with a SAK or
executing the command.
TABLE 4-3:
ARRAY PROTECTION
BP1
0
0
1
1
BP0
0
1
0
1
Address Ranges Write-Protected
None
Upper 1/4
Upper 1/2
All
Address Ranges Unprotected
All
Lower 3/4
Lower 1/2
None
TABLE 4-4:
PROTECTED ARRAY ADDRESS LOCATIONS
Density
1K
2K
4K
8K
16K
Upper 1/4
60h-7Fh
C0h-FFh
180h-1FFh
300h-3FFh
600h-7FFh
Upper 1/2
40h-7Fh
80h-FFh
100h-1FFh
200h-3FFh
400h-7FFh
All Sectors
00h-7Fh
00h-FFh
000h-1FFh
000h-3FFh
000h-7FFh
FIGURE 4-7:
WRITE STATUS REGISTER COMMAND SEQUENCE
SCIO
Standby Pulse
Start Header
0 1 0 1 0 1 0 1
Device Address
1 0 1 0 0 0 0 0 (1)
SCIO
Command
0 1 1 0 1 1 1 0
Status Register Data
7 6 5 4 3 2 1 0
Twc
Note 1: For the 11XXXX1, this bit must be a ‘ 1 ’.
? 2010 Microchip Technology Inc.
Preliminary
DS22067H-page 15
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