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参数资料
型号： 1893YI-10
厂商： INTEGRATED DEVICE TECHNOLOGY INC
元件分类： 网络接口
英文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封装： 10 X 10 MM, TQFP-64
文件页数： 16/152页
文件大小： 943K
代理商： 1893YI-10
ICS1893 Rev C 6/6/00
June, 2000
112
Chapter 9
Pin Diagram, Listings, and Descriptions
ICS1893 Data Sheet - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
9.3.4
MAC/Repeater Interface Pins
This section lists pin descriptions for each of the following interfaces
Section 9.3.4.1, “MAC/Repeater Interface Pins for Media Independent Interface”
Section 9.3.4.2, “MAC/Repeater Interface Pins for 100M Symbol Interface”
Section 9.3.4.3, “MAC/Repeater Interface Pins for 10M Serial Interface”
9.3.4.1
MAC/Repeater Interface Pins for Media Independent Interface
Table 9-5 lists the MAC/Repeater Interface pin descriptions for the MII.
Table 9-5.
MAC/Repeater Interface Pins: Media Independent Interface (MII)
Pin
Name
Pin
Number
Pin
Type
Pin Description
COL
49
Output
Collision (Detect).
The ICS1893 asserts a signal on the COL pin when the ICS1893 detects
receive activity while transmitting (that is, while the TXEN signal is
asserted by the MAC/repeater, that is, when transmitting). When the
mode is:
10Base-T, the ICS1893 detects receive activity by monitoring the
un-squelched MDI receive signal.
100Base-TX, the ICS1893 detects receive activity when there are two
non-contiguous zeros in any 10-bit symbol derived from the MDI
receive data stream.
Note:
1. The signal on the COL pin is not synchronous to either RXCLK or
TXCLK.
2. In full-duplex mode, the COL signal is disabled and always remains
low.
3. The COL signal is asserted as part of the signal quality error (SQE)
test. This assertion can be suppressed with the SQE Test Inhibit bit
(bit 18.2).
CRS
50
Output
Carrier Sense.
When the ICS1893 mode is:
Half-duplex, the ICS1893 asserts a signal on its CRS pin when it
detects either receive or transmit activity.
Either full-duplex or Repeater mode, the ICS1893 asserts a signal on
its CRS pin only in response to receive activity.
Note: The signal on the CRS pin is not synchronous to the signal on
either the RXCLK or TXCLK pin.
MDC
31
Input
Management Data Clock.
The ICS1893 uses the signal on the MDC pin to synchronize the transfer
of management information between the ICS1893 and the Station
Management Entity (STA), using the serial MDIO data line. The MDC
signal is sourced by the STA.
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