参数资料
型号: 24AA64FT-I/MNY
厂商: Microchip Technology
文件页数: 11/36页
文件大小: 0K
描述: IC SRL EEPROM 8KX8 1.8V 8-TDFN
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 100kHz,400kHz
接口: I²C,2 线串口
电源电压: 1.71 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-TDFN(2x3)
包装: 标准包装
产品目录页面: 1446 (CN2011-ZH PDF)
其它名称: 24AA64FT-I/MNYDKR
24AA64F/24LC64F/24FC64F
8.0
READ OPERATION
This terminates the write operation, but not before
the internal Address Pointer is set. The master then
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read
and sequential read.
issues the control byte again, but with the R/W bit set
to a one. The 24XX64F will then issue an acknowl-
edge and transmit the 8-bit data word. The master
will not acknowledge the transfer, but does generate
a Stop condition, which causes the 24XX64F to
discontinue transmission ( Figure 8-2 ). After a
8.1
Current Address Read
random Read command, the internal address coun-
The 24XX64F contains an address counter that main-
tains the address of the last word accessed, internally
ter will point to the address location following the one
that was just read.
incremented by one. Therefore, if the previous read
access was to address ‘n’ (n is any legal address), the
8.3
Sequential Read
next current address read operation would access data
from address n + 1 .
Upon receipt of the control byte with R/W bit set to one,
the 24XX64F issues an acknowledge and transmits the
eight-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24XX64F discontinues transmission ( Figure 8-1 ).
Sequential reads are initiated in the same way as
random reads, except that once the 24XX64F transmits
the first data byte, the master issues an acknowledge as
opposed to the Stop condition used in a random read.
This acknowledge directs the 24XX64F to transmit the
next sequentially-addressed 8-bit word ( Figure 8-3 ).
Following the final byte being transmitted to the master,
the master will NOT generate an acknowledge, but will
8.2
Random Read
generate a Stop condition. To provide sequential reads,
the 24XX64F contains an internal Address Pointer
Random read operations allow the master to access
any memory location in a random manner. To
perform this type of read operation, the word address
must first be set. This is accomplished by sending
the word address to the 24XX64F as part of a write
operation (R/W bit set to ‘ 0 ’). Once the word address
is sent, the master generates a Start condition
following the acknowledge.
which is incremented by one at the completion of each
operation. This Address Pointer allows the entire
memory contents to be serially read during one opera-
tion. The internal Address Pointer will automatically roll
over from address 1FFF to address 0000 if the master
acknowledges the byte received from the array address
1FFF.
FIGURE 8-1:
CURRENT ADDRESS READ
S
Bus Activity
Master
T
A
R
Control
Byte
Data (n)
S
T
O
T
P
SDA Line
Bus Activity
S
A
C
N
O
P
K
A
C
K
? 2009-2012 Microchip Technology Inc.
DS22154B-page 11
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