参数资料
| 型号： | 24C00T/ST |
| 厂商： | Microchip Technology |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 128BIT 400KHZ 8TSSOP |
| 产品培训模块： | I2C Serial EEPROM |
| 标准包装： | 2,500 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 128（16 x 8） |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 带卷 (TR) |
24AA00/24LC00/24C00
TABLE 1-2:
AC CHARACTERISTICS
All Parameters apply across all
recommended operating ranges
unless otherwise noted
Industrial (I):
Automotive (E):
T A = -40°C to +85°C, V CC = 1.8V to 5.5V
T A = -40°C to +125°C, V CC = 4.5V to 5.5V
Parameter
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note 1)
SDA and SCL fall time
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
Output valid from clock
(Note 2)
Symbol
F CLK
T HIGH
T LOW
T R
T F
T HD : STA
T SU : STA
T HD : DAT
T SU : DAT
T SU : STO
T AA
Min
—
—
—
4000
4000
600
4700
4700
1300
—
—
—
—
4000
4000
600
4700
4700
600
0
250
250
100
4000
4000
600
—
—
—
Max
100
100
400
—
—
—
—
—
—
1000
1000
300
300
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
3500
900
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
(Note 1)
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
(Note 2)
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
Bus free time: Time the bus must T BUF
be free before a new transmis-
sion can start
4700
4700
1300
—
—
—
ns
4.5V ≤ Vcc ≤ 5.5V (E Temp range)
1.7V ≤ Vcc ≤ 4.5V
4.5V ≤ Vcc ≤ 5.5V
Output fall time from V IH
T OF
20+0.1
250
ns
(Note 1) , CB ≤ 100 pF
minimum to V IL maximum
CB
Input filter spike suppression
T SP
—
50
ns
(Notes 1, 3)
(SDA and SCL pins)
Write cycle time
T WC
—
4
ms
Endurance
1M
—
cycles
(Note 4)
Note 1:
2:
3:
4:
Not 100% tested. C B = total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T SP and V HYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance? Model which can be obtained at www.microchip.com.
? 2007 Microchip Technology Inc.
DS21178G-page 3
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