参数资料
型号: 24C65T/SM
厂商: Microchip Technology
文件页数: 13/24页
文件大小: 0K
描述: IC EEPROM 64KBIT 400KHZ 8SOIC
产品培训模块: I2C Serial EEPROM
标准包装: 2,100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 400kHz
接口: I²C,2 线串口
电源电压: 4.5 V ~ 6 V
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIJ
包装: 带卷 (TR)
24AA65/24LC65/24C65
FIGURE 8-2:
CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY
1 Write command initiated at byte 0 of page 3 in the array;
First data byte is loaded into the cache byte 0.
cache page 0
2 64 bytes of data are loaded into cache.
cache
byte 0
cache
byte 1
? ? ?
cache
byte 7
cache page 1 cache page 2
bytes 8-15 bytes 16-23
? ? ?
cache page 7
bytes 56-63
3 Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
4 Remaining pages in cache are written
to sequential pages in array.
page 0 page 1 page 2
byte 0
byte 1
? ? ?
byte 7
page 4
? ? ?
page 7 array row n
page 0 page 1 page 2
page 3
page 4
? ? ?
page 7 array row n + 1
5 Last page in cache written to page 2 in next row.
FIGURE 8-3:
CACHE WRITE TO THE ARRAY STARTING AT A NON-PAGE BOUNDARY
1 Write command initiated; 64 bytes of data
2 Last 2 bytes loaded 'roll over'
Last 2 bytes
3
loaded into cache starting at byte 2 of page 0.
to beginning.
loaded into
page 0 of cache.
cache
byte 0
cache
byte 1
cache
byte 2
? ? ?
cache
byte 7
cache page 1 cache page 2
bytes 8-15 bytes 16-23
? ? ?
cache page 7
bytes 56-63
4 Write from cache into array initiated by STOP bit.
Page 0 of cache written to page 3 of array.
Write cycle is executed after every page is written.
5 Remaining bytes in cache are
written sequentially to array.
page 7 array
page 0 page 1 page 2
page 0 page 1 page 2
byte 0
byte 1
byte 2
byte 3
page 3
byte 4
? ? ?
byte 7
page 4
page 4
? ? ?
? ? ?
row n
page 7 array
row
n+1
6 Last 3 pages in cache written to next row in array.
? 2008 Microchip Technology Inc.
DS21073K-page 13
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