
21
Wake Up From Auto Powerdown
If the part enters the powerdown state through the auto powerdown mode, then the part can be
awakened by reset or by appropriate access to certain registers.
If a hardware or software reset is used then the part will go through the normal reset sequence. If the
access is through the selected registers, then the FDC resumes operation as though it was never in
powerdown. Besides activating the RESET pin or one of the software reset bits in the DOR or DSR
registers, the following register accesses will wake up the part:
1.
Enabling any one of the motor enable bits in the DOR register (reading the DOR does not
awaken the part).
2.
A read from the MSR register.
3.
A read or write to the Data register.
Once awake, the FDC will reinitiate the auto powerdown
timer
for
10 ms.
The
part
will
powerdown again when all the powerdown conditions are satisfied.
Register Behavior
Table 4 reiterates the AT and PS/2 (including Model 30) configuration registers available. It also
shows the type of access permitted. In order to maintain software transparency, access to all the
registers is maintained. As Table 4 shows, two sets of registers are distinguished based on whether
their access results in the part remaining in powerdown state or exiting it.
Access to all other registers is possible without awakening the part. These registers can be accessed
during powerdown without changing the status of the part. A read from these registers will reflect the
true status as shown in the register description in the FDC section. Writes to these registers will
result in the part retaining the data and subsequently reflecting it when the part awakens. Accessing
the part during powerdown may cause an increase in the power consumption by the part. The part
will revert back to its low power mode when the access has been completed.
Pin Behavior
The FDC37C957FR is specifically designed for portable PC systems in which power conservation is a
primary concern. This makes the behavior of the pins during powerdown very important.
The pins which interface to the floppy disk drive are disabled so that no power will be drawn through
the part as a result of any voltage applied to the pin within the VCC2 power supply range. Most of the
pins which interface to the system are left active to monitor system accesses that may wake up the
part.