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参数资料
| 型号： | 405GPR |
| 厂商： | Applied Micro Circuits Corp. |
| 英文描述： | Power PC 405GPr Embedded Processor |
| 中文描述： | 405GPr的Power PC嵌入式处理器 |
| 文件页数： | 25/57页 |
| 文件大小： | 614K |
| 代理商： | 405GPR |
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405GPr – Power PC 405GPr Embedded Processor
AMCC
31
Revision 2.04 – September 7, 2007
Data Sheet
PCIGnt0[Req]
Gnt0 when internal arbiter is used
or
Req when external arbiter is used.
O
5V tolerant
3.3V PCI
PCIGnt1:5
Used as PCIGnt1:5 output when internal arbiter is used.
O
5V tolerant
3.3V PCI
Ethernet Interface
PHYRxD3:0
Received data. This is a nibble wide bus from the PHY. The data is
synchronous with the PHYRxClk.
I
5V tolerant
3.3V LVTTL
1
EMCTxD3:0
Transmit data. A nibble wide data bus towards the net. The data is
synchronous to the PHYTxClk.
O
5V tolerant
3.3V LVTTL
6
PHYRxErr
Receive Error. This signal comes from the PHY and is synchronous
to the PHYRxClk.
I
5V tolerant
3.3V LVTTL
1
PHYRxClk
Receiver Medium clock. This signal is generated by the PHY.
I
5V tolerant
3.3V LVTTL
1
PHYRxDV
Receive Data Valid. Data on the Data Bus is valid when this signal is
activated. Deassertion of this signal indicates end of the frame
reception.
I
5V tolerant
3.3V LVTTL
1
PHYCrS
Carrier Sense signal from the PHY. This is an asynchronous signal.
I
5V tolerant
3.3V LVTTL
1
EMCTxErr
Transmit Error. This signal is generated by the Ethernet controller, is
connected to the PHY and is synchronous with the PHYTxClk. It
informs the PHY that an error was detected.
O
5V tolerant
3.3V LVTTL
6
EMCTxEn
Transmit Enable. This signal is driven by the EMAC to the PHY. Data
is valid during the active state of this signal. Deassertion of this signal
indicates end of frame transmission. This signal is synchronous to
the PHYTxClk.
O
5V tolerant
3.3V LVTTL
6
PHYTxClk
This clock comes from the PHY and is the Medium Transmit clock.
I
5V tolerant
3.3V LVTTL
1
PHYCol
Collision signal from the PHY. This is an asynchronous signal.
I
5V tolerant
3.3V LVTTL
1
EMCMDClk
Management Data Clock. The MDClk is sourced to the PHY. This
clock has a period of 400ns, adjustable via EMAC0_STACR[OPBC].
Management information is transferred synchronously with respect to
this clock.
O
5V tolerant
3.3V LVTTL
EMCMDIO[PHYMDIO]
Management Data Input/Output is a bidirectional signal between the
Ethernet controller and the PHY. It is used to transfer control and
status information.
I/O
5V tolerant
3.3V LVTTL
1
Signal Functional Description (Sheet 2 of 8)
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Bus Control Signals” on page 29.
Signal Name
Description
I/O
Type
Notes
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 405-GR | 制造商:Leviton Manufacturing Co 功能描述: |
| 405HC5900KR | 功能描述:4μF Film Capacitor 900V Polypropylene (PP) Axial 4.016" Dia (102.00mm) 制造商:illinois capacitor 系列:HC5 包装:散装 零件状态:新产品 电容:4μF 容差:±10% 额定电压 - AC:900V 额定电压 - DC:- 介电材料:聚丙烯（PP） ESR（等效串联电阻）:0.9 毫欧 工作温度:-40°C ~ 85°C 安装类型:底座安装 封装/外壳:轴向 大小/尺寸:4.016" 直径（102.00mm） 高度 - 安装（最大值）:2.819"（71.60mm） 端接:螺钉端子 引线间距:- 应用:传导冷却，高脉冲，DV/DT 特性:- 标准包装:5 |
| 405I11AM | 制造商:CTS 制造商全称:CTS Corporation 功能描述:Surface Mount Quartz Crystal |
| 405I11BM | 制造商:CTS 制造商全称:CTS Corporation 功能描述:Surface Mount Quartz Crystal |
| 405I11CM | 制造商:CTS 制造商全称:CTS Corporation 功能描述:Surface Mount Quartz Crystal |
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