参数资料
型号: 5962R0722701VZA
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: ADC
英文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDSO16
封装: CERAMIC, SOIC-16
文件页数: 2/22页
文件大小: 510K
代理商: 5962R0722701VZA
Specification Definitions
ACQUISITION TIME
is the time required for the ADC to ac-
quire the input voltage. During this time, the hold capacitor is
charged by the input voltage.
APERTURE DELAY
is the time between the fourth falling
edge of SCLK and the time when the input signal is internally
acquired or held for conversion.
CONVERSION TIME
is the time required, after the input volt-
age is acquired, for the ADC to convert the input voltage to a
digital word.
CHANNEL-TO-CHANNEL ISOLATION
is resistance to cou-
pling of energy from one channel into another channel.
CROSSTALK
is the coupling of energy from one channel into
another channel. This is similar to Channel-to-Channel Isola-
tion, except for the sign of the data.
DIFFERENTIAL NON-LINEARITY (DNL)
is the measure of
the maximum deviation from the ideal step size of 1 LSB.
DUTY CYCLE
is the ratio of the time that a repetitive digital
waveform is high to the total time of one period. The specifi-
cation here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS)
is another method of specifying Signal-to-Noise and
Distortion or SINAD. ENOB is defined as (SINAD - 1.76) / 6.02
and says that the converter is equivalent to a perfect ADC of
this (ENOB) number of bits.
FULL POWER BANDWIDTH
is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
GAIN ERROR
is the deviation of the last code transition
(111...110) to (111...111) from the ideal (V
REF - 1.5 LSB), after
adjusting for offset error.
INTEGRAL NON-LINEARITY (INL)
is a measure of the de-
viation of each individual code from a line drawn from negative
full scale ( LSB below the first code transition) through pos-
itive full scale ( LSB above the last code transition). The
deviation of any given code from this straight line is measured
from the center of that code value.
INTERMODULATION DISTORTION (IMD)
is the creation of
additional spectral components as a result of two sinusoidal
frequencies being applied to an individual ADC input at the
same time. It is defined as the ratio of the power in either the
second or the third order intermodulation products to the sum
of the power in both of the original frequencies. Second order
products are f
a ± fb, where fa and fb are the two sine wave
input frequencies. Third order products are (2f
a ± fb ) and
(f
a ± 2fb). IMD is usually expressed in dB.
MISSING CODES
are those output codes that will never ap-
pear at the ADC outputs. The ADC128S102 is guaranteed not
to have any missing codes.
OFFSET ERROR
is the deviation of the first code transition
(000...000) to (000...001) from the ideal (i.e. GND + 0.5 LSB).
SIGNAL TO NOISE RATIO (SNR)
is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the sam-
pling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or
SINAD)
Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral com-
ponents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR)
is the differ-
ence, expressed in dB, between the desired signal amplitude
to the amplitude of the peak spurious spectral component,
where a spurious spectral component is any signal present in
the output spectrum that is not present at the input and may
or may not be a harmonic.
TOTAL HARMONIC DISTORTION (THD)
is the ratio, ex-
pressed in dBc, of the rms total of the first five harmonic
components at the output to the rms level of the input signal
frequency as seen at the output. THD is calculated as
where A
f1 is the RMS power of the input frequency at the out-
put and A
f2 through Af10 are the RMS power in the first 9
harmonic frequencies.
THROUGHPUT TIME
is the minimum time required between
the start of two successive conversions. It is the acquisition
time plus the conversion time.
www.national.com
10
ADC128S102QML
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