参数资料
型号: 5962R9675501VJX
厂商: INTERSIL CORP
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 0.35 us SETTLING TIME, 12-BIT DAC, CDIP24
封装: SIDE BRAZED, DIP-24
文件页数: 1/7页
文件大小: 125K
代理商: 5962R9675501VJX
1
TM
File Number
3278.4
HS-565ARH
Radiation Hardened High Speed,
Monolithic Digital-to-Analog Converter
The HS-565ARH is a fast, radiation hardened 12-bit current
output, digital-to-analog converter. The monolithic chip
includes a precision voltage reference, thin-lm R-2R ladder,
reference control amplier and twelve high-speed bipolar
current switches.
The Intersil Corporation Dielectric Isolation process provides
latch-up free operation while minimizing stray capacitance
and leakage currents, to produce an excellent combination
of speed and accuracy. Also, ground currents are minimized
to produce a low and constant current through the ground
terminal, which reduces error due to code-dependent ground
currents.
HS-565ARH die are laser trimmed for a maximum integral
nonlinearity error of
±0.25 LSB at 25oC. In addition, the low
noise buried zener reference is trimmed both for absolute
value and minimum temperature coefcient.
Specications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specications for these devices are
contained in SMD 5962-96755. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.htm
Features
Electrically Screened to SMD # 5962-96755
QML Qualied per MIL-PRF-38535 Requirements
Total Dose . . . . . . . . . . . . . . . . . . . . . 100 krad (Si) (Max)
DAC and Reference on a Single Chip
Pin Compatible with AD-565A and HI-565A
Very High Speed: Settles to 0.50 LSB in 500ns Max
Monotonicity Guaranteed Over Temperature
0.50 LSB Max Nonlinearity Guaranteed Over Temperature
Low Gain Drift
(Max., DAC Plus Reference) . . . . . . . . . . . . . . .50ppm/oC
±0.75 LSB Accuracy Guaranteed Over Temperature
(
±0.125 LSB Typical at 25oC)
Applications
High Speed A/D Converters
Precision Instrumentation
Signal Reconstruction
Functional Diagram
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(oC)
5962R9675501V9A
HS0-565ARH-Q
25
5962R9675501VJC
HS1-565ARH-Q
-55 to 125
5962R9675501VXC
HS9-565ARH-Q
-55 to 125
HS9-565ARH/PROTO
-55 to 125
REF OUT VCC
43
+
-
19.95K
REF
10V
6
5
REF
+
-
3.5K
3K
IREF
0.5mA
-VEE
PWR
GND
712
24 . . . 13
MSB LSB
(4X IREF
X CODE)
GND
IN
20V
SPAN
10V
SPAN
OUT
IO
DAC
9.95K
BIP.
OFF.
8
5K
2.5K
11
10
9
Data Sheet
November 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil and Design is a trademark of Intersil Corporation. | Copyright Intersil Corporation 2000
相关PDF资料
PDF描述
5962R9675501VJX PARALLEL, WORD INPUT LOADING, 0.35 us SETTLING TIME, 12-BIT DAC, CDIP24
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