参数资料
型号: 71M6511H-IGT/F
厂商: Maxim Integrated
文件页数: 37/98页
文件大小: 0K
描述: IC ENERGY METER RESIDENT 64-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 160
系列: *
71M6511/71M6511H
Single-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
NOVEMBER 2010
On-Chip Resources
DIO Ports
The 71M6511/6511H includes up to 12 pins of general purpose digital I/O. These pins are dual function and can alternatively
be used as LCD drivers. Figure 8 shows a block diagram of the DIO section.
On reset or power-up, all DIO pins are inputs until they are configured for the desired direction. The pins are configured and
controlled by the DIO and DIO_DIR registers (SFRs) and by the five bits of the I/O register LCD_NUM (0x2020[4:0]). See the
description for LCD_NUM in the I/O RAM Section for a table listing the available segment pins versus DIO pins, depending on
the selection for LCD_NUM . Generally, increasing the value for LCD_NUM will configure an increasing number of general
purpose pins to be LCD segment pins, starting at the higher pin numbers.
LCD DISPLAY
DRIVER
COM0..3
SEG0..SEG2
LCD_NUM
LCD_MODE
LCD_CLK
LCD_EN
DIGITAL I/O
DIO_EEX
PULSEV/W
DIO_IN
DIO_OUT
LCD_NUM
DIO_GP
SEG8..SEG19
SEG24/DIO4 ...
SEG31/DIO11
SEG34/DIO14 ...
SEG37/DIO17
SEG3/SCLK
SEG4/SSDATA
SEG5/SFR
SEG6/SRDY
SEG7/
MUX_SYNC
Figure 8: DIO Ports Block Diagram
Each pin declared as DIO can be configured independently as an input or output with the bits of the DIO_DIRn registers. Table
52 lists the direction registers and configurability associated with each group of DIO pins. Table 53 shows the configuration for
a DIO pin through its associated bit in its DIO_DIR register.
DIO
Pin number
0
--
1
--
2
--
3
--
4
37
5
38
6
39
7
40
8
41
9
42
10
43
11
44
12
--
13
--
14
20
15
21
Data Register bit
--
--
-- -- 4 5
DIO0=P0 (SFR 0x80)
6
7
0
1
2 3 -- --
DIO1=P1 (SFR 0 x90)
6
7
Direction Register
--
--
--
--
4
5
6
7
0
1
2
3
--
--
6
7
bit
DIO_DIR0 (SFR 0 xA2)
DIO_DIR1 (SFR 0x91)
Internal Resources
Configurable
--
--
--
--
Y
Y
Y
Y
Y
Y
Y
Y
--
--
N
N
DIO
Pin number
16
22
17
12
18
--
19
--
20
--
21
--
22
--
23
--
Data Register bit
0
1
-- -- -- --
DIO2=P2 (SFR 0xA0)
--
--
Direction Register
0
1
--
--
--
--
--
--
bit
DIO_DIR2 (SFR 0 xA1)
Internal Resources
Configurable
N
N
--
--
--
--
--
--
Table 52: Data/Direction Registers and Internal Resources for DIO Pin Groups
Page: 37 of 98
? 2005–2010 Teridian Semiconductor Corporation
V2.7
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