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参数资料
| 型号： | 71M6511H-IGT/F |
| 厂商： | Maxim Integrated |
| 文件页数： | 61/98页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER RESIDENT 64-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 160 |
| 系列： | * |
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71M6511/71M6511H
Single-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
NOVEMBER 2010
FLSH_ERASE
SFR 94
W
Flash Erase Initiate
FLSH_ERASE is used to initiate either the Flash Mass Erase cycle or
the Flash Page Erase cycle. Specific patterns are expected for
FLSH_ERASE in order to initiate the appropriate Erase cycle.
(default = 0x00).
0x55 – Initiate Flash Page Erase cycle. Must be proceeded by a write
to FLSH_PGADR @ SFR 0xB7.
0xAA – Initiate Flash Mass Erase cycle. Must be proceeded by a write
to FLSH_MEEN @ SFR 0xB2 and the debug (CC) port must
be enabled.
Any other pattern written to FLSH_ERASE will have no effect.
FLSH_MEEN
SFR B2[1]
W
Mass Erase Enable
0 – Mass Erase disabled (default).
1 – Mass Erase enabled.
Must be re-written for each new Mass Erase cycle .
FLSH_PGADR
SFR B7[7:1]
W
Flash Page Erase Address
FLSH_PGADR[6:0] – Flash Page Address (page 0 thru 127) that will be
erased during the Page Erase cycle. (default = 0x00).
Must be re-written for each new Page Erase cycle.
FLSH_PWE
SFR B2[0]
R/W
Program Write Enable
0 – MOVX commands refer to XRAM Space, normal operation
(default).
1 – MOVX @DPTR,A moves A to Program Space (flash) @ DPTR.
This bit is automatically reset after each byte written to flash. Writes to
this bit are inhibited when interrupts are enabled.
IE_XFER
IE_RTC
SFR E8[0]
SFR E8[1]
R/W
Interrupt flags. These flags are part of the WDI SFR register and mo-
nitor the XFER_BUSY interrupt and the RTC_1SEC interrupt. The
flags are set by hardware and must be cleared by the interrupt handler.
See also WD_RST .
INTBITS
SFR F8[6:0]
R
Interrupt inputs. The MPU may read these bits to see the input to
external interrupts INT0, INT1, up to INT6. These bits do not have any
memory and are primarily intended for debug use.
LCD_BSTEN
LCD_CLK[1:0]
2020[7]
2021[1:0]
R/W
R/W
Enables the LCD voltage boost circuit.
Sets the LCD clock frequency for COM/SEG pins (not the frame rate.
00: f w /2 , 01: f w /2 , 10: f w /2 , 11: f w /2
Note: f w = CKFIR/128
9 8 7 6
LCD_EN
2021[5]
R/W
Enables the LCD display. When disabled, VLC2, VLC1, and VLC0 are
ground as are the COM and SEG outputs.
LCD_FS[4:0]
2022[4:0]
R/W
Controls the LCD full scale voltage, VLC2:
LCD _ FS
VLC 2 = VLCD ? ( 0 . 7 + 0 . 3
)
31
Page: 61 of 98
? 2005–2010 Teridian Semiconductor Corporation
V2.7
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 71M6511H-IGTR | 制造商:Maxim Integrated Products 功能描述:RESID. HI PRECISION METR (1P, .1%) - Tape and Reel |
| 71M6511H-IGTR/F | 功能描述:计量片上系统 - SoC Highly Integrated SoC w/MCU Core RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6511-IGT | 制造商:TERIDIAN 制造商全称:TERIDIAN 功能描述:Single-Phase Energy Meter IC |
| 71M6511-IGT/F | 功能描述:计量片上系统 - SoC Highly Integrated SoC w/MCU Core RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
| 71M6511-IGT/F1 | 功能描述:计量片上系统 - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel |
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