参数资料
型号: 71M6511H-IGT/F
厂商: Maxim Integrated
文件页数: 44/98页
文件大小: 0K
描述: IC ENERGY METER RESIDENT 64-LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 160
系列: *
71M6511/71M6511H
Single-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
NOVEMBER 2010
Status
Name
Read/
Reset
Polarity
Description
Bit
Write
State
7
6
5
4
ERROR
BUSY
RX_ACK
TX_ACK
R
R
R
R
0
0
1
1
Positive
Positive
Negative
Negative
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the EEPROM
CMD
0
Operation
No-op. Applying the no-op command will stop the I2C clock
(SCK, DIO4). Failure to issue the no-op command will keep
the SCK signal toggling.
3-0
CMD[3:0
]
W
0
Positive,
see CMD
Table
2
3
5
Receive a byte from EEPROM and send ACK.
Transmit a byte to EEPROM.
Issue a ‘STOP’ sequence.
6
9
Others
Receive the last byte from EEPROM and do not send ACK.
Issue a ‘START’ sequence.
No Operation, set the ERROR bit.
Table 57: EECTRL Status Bits
Internal Clocks and Clock Dividers
All internal clocks are based on the watch crystal frequency (CK32 = 32,768Hz) applied to the XIN and XOUT pins. The PLL
multiplies this frequency by 150 to 4.9152MHz. This frequency is supplied to the ADC, the FIR filter (CKFIR), the clock test
output pin (CKTEST), the CE DRAM and the clock generator. The clock generator provides two clocks, one for the MPU
(CKMPU) and one for the CE (CKCE).
The MPU clock frequency is determined by the I/O RAM register MPU_DIV (0x2004[2:0]) and can be CE*2
-MPU_DIV
Hz where
MPU_DIV varies from 0 to 7 ( MPU_DIV is 0 on power-up). This makes the MPU clock scalable from 4.9152MHz down to
38.4kHz.
The circuit also generates a 2x MPU clock for use by the emulator. This clock is not generated when the I/O RAM register
ECK_DIS (0x2005[5]) is asserted by the MPU.
Battery
The VBAT pin provides an input for an external battery that can be used to support the crystal oscillator, RTC, the WD_OVF bit
and XRAM in the absence of the main power supply. If the battery is not used, the VBAT pin should be connected to V3P3.
Internal Voltages (VBIAS, VBAT, V2P5)
The 71M6511 requires two supply voltages, V3P3A, for the analog section, and V3P3D, for the digital section. Both voltages
can be tied together outside the chip. The internal supply voltage V2P5 is generated by a regulator from the 3.3V supplies.
The battery voltage, VBAT, is required when crystal oscillator, RTC and XRAM are required to keep operating while V3P3D is
removed (battery mode). VBAT, usually supplied by an external battery, powers crystal oscillator, RTC and XRAM (and the
WD_OVF bit).
VBIAS (1.5V) is generated internally and used for the V1 comparator and for the reference of the temperature sensor.
Test Ports
Page: 44 of 98
? 2005–2010 Teridian Semiconductor Corporation
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71M6511-IGT/F1 功能描述:计量片上系统 - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 处理器系列:71M6511 类型:Metering SoC 最大时钟频率:70 Hz 程序存储器大小:64 KB 数据 RAM 大小:7 KB 接口类型:UART 可编程输入/输出端数量:12 片上 ADC: 安装风格:SMD/SMT 封装 / 箱体:LQFP-64 封装:Reel