参数资料
型号: 71M6543F-IGT/F
厂商: Maxim Integrated Products
文件页数: 7/154页
文件大小: 0K
描述: IC ENERGY METERING
标准包装: 90
系列: *
71M6543F/71M6543G Data Sheet
Table 49: Data/Direction Registers for SEGDIO32 to SEGDIO45.............................................................. 60
Table 50: Data/Direction Registers for SEGDIO51 to SEGDIO55.............................................................. 61
Table 51: LCD_VMODE Configurations ...................................................................................................... 61
Table 52: LCD Configurations ..................................................................................................................... 63
Table 53: LCD Data Registers for SEGDIO46 to SEGDIO55 ..................................................................... 64
Table 54: EECTRL Bits for 2-pin Interface ................................................................................................... 65
Table 55: EECTRL Bits for the 3-wire Interface ........................................................................................... 66
Table 56: SPI Transaction Fields ................................................................................................................ 68
Table 57: SPI Command Sequences .......................................................................................................... 69
Table 58: SPI Registers .............................................................................................................................. 69
Table 59: TMUX[4:0] Selections ................................................................................................................. 72
Table 60: TMUX2[4:0] Selections ............................................................................................................... 73
Table 61: Available Circuit Functions .......................................................................................................... 76
Table 62: VSTAT[2:0] (SFR 0xF9[2:0]) ........................................................................................................ 79
Table 63: Wake Enable and Flag Bits ......................................................................................................... 81
Table 64: Wake Bits .................................................................................................................................... 82
Table 65: Clear Events for WAKE flags ...................................................................................................... 83
Table 66: GAIN_ADJn Compensation Channels (Figure 2, Figure 31, Table 1) ........................................ 90
Table 67: GAIN_ADJx Compensation Channels (Figure 3, Figure 32, Table 2) ........................................ 91
Table 68: I/O RAM Map – Functional Order, Basic Configuration .............................................................. 96
Table 69: I/O RAM Map – Functional Order ............................................................................................... 98
Table 70: I/O RAM Map – Alphabetical Order .......................................................................................... 102
Table 71: CE EQU[2:0] Equations and Element Input Mapping ............................................................... 117
Table 72: CE Raw Data Access Locations ............................................................................................... 118
Table 73: CESTATUS Register ................................................................................................................... 119
Table 74: CESTATUS Bit Definitions .......................................................................................................... 119
Table 75: CECONFIG Register .................................................................................................................. 119
Table 76: CECONFIG Bit Definitions (CE RAM 0x20) ............................................................................... 120
Table 77: Sag Threshold, Phase Measurement, and Gain Adjust Control ............................................... 121
Table 78: CE Transfer Variables (with Shunts)......................................................................................... 121
Table 79: CE Transfer Variables (with CTs) ............................................................................................. 122
Table 80: CE Energy Measurement Variables (with Shunts) ................................................................... 122
Table 81: CE Energy Measurement Variables (with CTs) ........................................................................ 122
Table 82: Other Transfer Variables ........................................................................................................... 123
Table 83: CE Pulse Generation Parameters ............................................................................................. 125
Table 84: CE Parameters for Noise Suppression and Code Version ....................................................... 126
Table 85: CE Calibration Parameters ....................................................................................................... 127
Table 86: Absolute Maximum Ratings ...................................................................................................... 130
Table 87: Recommended External Components ...................................................................................... 131
Table 88: Recommended Operating Conditions ....................................................................................... 131
Table 89: Input Logic Levels ..................................................................................................................... 132
Table 90: Output Logic Levels .................................................................................................................. 132
Table 91: Battery Monitor Performance Specifications ( TEMP_BAT = 1) ................................................. 133
Table 92: Temperature Monitor ................................................................................................................ 134
Table 93: Supply Current Performance Specifications ............................................................................. 135
Table 94: V3P3D Switch Performance Specifications .............................................................................. 136
Table 95: Internal Power Fault Comparators Performance Specifications ............................................... 136
Table 96: 2.5 V Voltage Regulator Performance Specifications ............................................................... 136
Table 97: Low-Power Voltage Regulator Performance Specifications ..................................................... 137
Table 98: Crystal Oscillator Performance Specifications .......................................................................... 137
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