参数资料
型号: 73M1866B-KEYCHN
厂商: Maxim Integrated Products
文件页数: 31/88页
文件大小: 0K
描述: BOARD KEYCHAIN INF DANUBE EVM
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
DS_1x66B_001
73M1866B/73M1966B Data Sheet
Rev. 1.6
37
6
Control and Status Registers
Table 31 shows the 73M1x66B register map of addressable registers. The shaded cells indicate read-only
bits and cannot be modified. Reserved bits should be left in their default state. Accessing unspecified
registers should be avoided. Each register and bit is described in detail in the following sections.
For registers 0x12 through 0x1F, which are located in the Line-Side Device, there is a minimum time
between consecutive write transactions of 300
s when using an 8 kHz sample rate.
Table 31: Control and Status Register Map
Address
(hex)
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
02
10h
Reserved
Reserved
03
E0h
04
E4h
Reserved
05
1Bh
06
00h
Reserved
07
00h
Reserved
08
00h
09
00h
0D
40h
Reserved
Reserved
0E
00h
Reserved
0F
80h
Reserved
10
00h
Reserved
12
00h
13
00h
Reserved
14
00h
Reserved
15
00h
Reserved
16
00h
17
00h
Reserved
Reserved
18
01h
Reserved
19
00h
Reserved
1A
00h
1B
00h
Reserved
1C
00h
Reserved
1D
00h
Reserved
1E
00h
Reserved
1F
00h
20
00h
21
00h
22
00h
23
00h
24
00h
Reserved
25
00h
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