参数资料
型号: 73S8009C-DB
厂商: Maxim Integrated Products
文件页数: 17/32页
文件大小: 0K
描述: BOARD DEMO 73S8009C 32-QFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
DS_8009C_025
VP
73S8009C Data Sheet
C
See NOTE 2
VDD
See NOTE 7
10 μ H
VDD _supply _to_uC
See NOTE 8
See NOTE 3
VBAT
C3
10 μ F
C6
0.1 μ F
OFF _interrupt_to_uC
See NOTE 1
I/OUC_to/from_uC
VBUS
Pushbutton Switch
AUX1UC_to/from_uC
AUX2UC_to/from_uC
CMDVCC% _from_uC
CMDVCC# _from_uC
RSTIN_from_uC
1
2
3
4
5
6
7
8
I/OUC
AUX1UC
AUX2UC
CMDVCC%
CMDVCC#
RSTIN
CLKIN
RDY
ON/OFF
VBUS
I/O
AUX1
AUX2
VCC
RST
GND
24
23
22
21
20
19
18
17
SW1
27pF
See
CLKIN_from_uC
C5
NOTE 6
RDY_status_to_uC
OFF_ACK_from_uC
OFF_REQ_to_uC
73S80009C
32 QFN
See
NOTE 5
0
27pF
See
CS_from_uC
See
NOTE 4
VDD
R2
C4
NOTE 6
NOTES:
1) VBUS = 4.5V to 5.5V DC.
2) VPC = 2.7V to 6.5V DC (should only be used when V BAT and
4.7 μ F
C2
20K
Card detection
switch is
normally closed
0.47 μ F, Low ESR (<100 M? )
should be placed near the
C1 SC connecter contact
V BUS are unused)
3) VBAT = 4.0V to 6.5V DC.
4) Internal pull-up allows it to be left open if unused.
5) Resistor footpring is included in case some filtering is needed on CLK
6) Capacitors C4 and C5 are provisional and their footprints should be added
for added noise rejection if necessary.
7) Inductor must be rated for 400 mA maximum peak current.
Smart Card Connector
CLK track should be routed
far from RST, I/O, C4 and C8
8) V DD - 3.3V, +/- 0.3V, 40mA max. Requires min two 0.1 μ F caps to gnd)
Figure 3: Typical 73S8009C Application Schematic
Rev. 1.5
17
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