参数资料
型号: 73S8009C-DB
厂商: Maxim Integrated Products
文件页数: 7/32页
文件大小: 0K
描述: BOARD DEMO 73S8009C 32-QFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
DS_8009C_025
Table 1 describes the pin functions for the device.
Table 1: 73S8009C Pin Definitions
73S8009C Data Sheet
Pin
Name
Pin
(QFN32)
Type
Equivalent
Circuit
Description
Card Interface
I/O
22
IO
Card I/O: Data signal to/from card. Includes a pull-up
resistor to V CC.
AUX1
21
IO
AUX1: Auxiliary data signal to/from card. Includes a
pull-up resistor to V CC.
AUX2
20
IO
AUX2: Auxiliary data signal to/from card. Includes a
pull-up resistor to V CC.
RST
18
O
Card reset: provides reset (RST) signal to card. RST is
the pass through signal on RSTIN. Internal control logic
will hold RST low when card is not activated or VCC is
too low.
CLK
16
O
Card clock: provides clock signal (CLK) to card. CLK is
the pass through of the signal on pin CLKIN. Internal
control logic will hold CLK low when card is not
activated or VCC is too low.
PRES
14
I
Card Presence switch: active high indicates card is
present. Should be tied to GND when not used, but it
Includes a high-impedance pull-down current source.
PRES
13
I
Card Presence switch: active low indicates card is
present. Should be tied to V DD when not used, but it
Includes a high-impedance pull-up current source.
VCC
19
PSO
Card power supply – logically controlled by sequencer,
output of LDO regulator. Requires an external 0.47 μ F
low ESR filter capacitor to GND.
GND
17
GND
Card ground.
Miscellaneous Inputs and Outputs
CLKIN
TEST1
7
10
I
Clock signal source for the card clock.
Factory test pin. This pin must be tied to GND in
typical applications.
TEST2
30
Factory test pin. This pin must be tied to GND in
typical applications.
Power Supply and Ground
VDD
29
PSO
System interface supply voltage and supply voltage for
companion controller circuitry. Requires a minimum of
two 0.1 μ F capacitors to ground for proper decoupling.
VPC
26
PSI
Power supply source for main voltage converter circuit.
A 10 μ F and a 0.1 μ F ceramic capacitor must be
connected to this pin.
VBAT
Rev. 1.5
25
Alternate power source input, typically from two series
cells, V > 4 V.
7
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