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| 型号： | 73S8014RT-DB |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO 73S8010RT 20-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 系列： | * |
UM_8014_010
73S8014R/RN/RT 20SO Demo Board User Manual
2
2.1
Design Considerations
General Layout Rules
Keep the CLK signal as short as possible and with few bends in the trace. Keep route of the CLK trace to
one layer (avoid vias to other plane). Keep CLK trace away from other traces especially RST and VCC.
Filtering of the CLK trace is allowed for noise purpose. Up to 30pF to ground is allowed at the CLK pin of
the smart card connector. Also, the 0 ? series resistor, R7, can be replaced for additional filtering (no
more than 100 ? ).
Keep the VCC trace as short as possible. Make trace a minimum of 0.5mm thick. Also, keep VCC away
from other traces especially RST and CLK.
Keep RST trace away from VCC and CLK traces. Up to 30pF to ground is allowed for filtering.
Keep 0.1 μ F close to the VDD pin of the device and directly take other end to ground.
Keep 0.1 μ F and 10 μ F close to the VPC pin of the device and directly take other end to ground.
Keep 1.0 μ F close to the VCC pin of the smart card connector and directly take other end to ground
2.2
Optimization for Compliance with NDS
Default configuration of the Demo Board contains a 27pF capacitor (C12) from the CLK pin of the smart
connector to ground and a 27pF capacitor (C9) from the RST pin of the smart connector to ground.
These capacitors serve as filters for the CLK and RST signals in the case of long traces or test equipment
perturbations. The capacitor on CLK reduces ringing on the trace, reduces coupling to other traces and
slows down the edge of the CLK signal. The capacitor on RST helps the perturbation specification in a
noisy environment. The filter capacitors can be useful in the EMV test environment and have no effect on
NDS testing
C12 and C9 are represented on both the schematic and BOM. These capacitors are optional filter
capacitors on the smart card lines CLK and RST, respectively for each card interface. These capacitors
may be adjusted (value, not to exceed 30pF) or removed to optimize performance in each specific
application (PCB, card clock frequency, compliance with applicable standards, etc.).
Rev. 1.0
9
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| 73S8014RT-IL/F | 功能描述:输入/输出控制器接口集成电路 Smart Card Interface Comp w/8024 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| 73S8014RT-IL/F1 | 功能描述:输入/输出控制器接口集成电路 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| 73S8014RT-IL/F2 | 功能描述:输入/输出控制器接口集成电路 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| 73S8014RT-IL/F3 | 功能描述:输入/输出控制器接口集成电路 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
| 73S8014RT-ILR/F | 功能描述:输入/输出控制器接口集成电路 Smart Card Interface Comp w/8024 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray |
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