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参数资料
| 型号： | 844256BGT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | XO, clock |
| 英文描述： | 622.08 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 |
| 文件页数： | 2/17页 |
| 文件大小： | 390K |
| 代理商： | 844256BGT |
IDT / ICS LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
10
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC couple capacitor. A general interface diagram is
shown in
Figure 3. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it
is recommended that the amplitude be reduced from full swing
to half swing in order to prevent signal interference with the
power rail and to reduce noise. This configuration requires that
the output impedance of the driver (Ro) plus the series
resistance (Rs) equals the transmission line impedance. In
addition, matched termination at the crystal input will attenuate
the signal in half. This can be done in one of two ways. First,
R1 and R2 in parallel should equal the transmission line
impedance. For most 50
Ω applications, R1 and R2 can be 100Ω.
This can also be accomplished by removing R1 and making R2
50
Ω.
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
XTAL_IN
XTAL_OUT
VCC
R2
Ro
R1
Zo = 50
Rs
VCC
.1uf
VDD
Zo = Ro + Rs
Reference Document: JEDEC Publication 95, MO-153
3.3V, 2.5V LVDS DRIVER TERMINATION
A general LVDS interface is shown in
Figure 4. In a 100
Ω
differential transmission line environment, LVDS dr ivers
FIGURE 4. TYPICAL LVDS DRIVER TERMINATION
require a matched load termination of 100
Ω across near
the receiver input.
2.5V or 3.3V
+
-
VDD
100 Ohm Differential Transmission Line
R1
100
LVDS_Driv er
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相关代理商/技术参数 |
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| 844256CK-24LF | 制造商:Integrated Device Technology Inc 功能描述:LVDS 0.385V 32PIN VFQFN - Rail/Tube |
| 844256CK-24LFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Synthesizer Single 32-Pin VFQFPN EP T/R 制造商:Integrated Device Technology Inc 功能描述:32 VFQFN (LEAD-FREE) - Tape and Reel |
| 844256DGILF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 844256DGILFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 844256DGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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