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参数资料
| 型号： | 844256BGT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | XO, clock |
| 英文描述： | 622.08 MHz, OTHER CLOCK GENERATOR, PDSO24 |
| 封装： | 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 |
| 文件页数： | 3/17页 |
| 文件大小： | 390K |
| 代理商： | 844256BGT |
IDT / ICS LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
11
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
FIGURE 5. ASSEMBLY FOR EXPOSED PAD THERMAL RELEASE PATH –SIDE VIEW (DRAWING NOT TO SCALE)
EPAD THERMAL RELEASE PATH
In order to maximize both the removal of heat from the package
and the electr ical perfor mance, a land patter n must be
incorporated on the Printed Circuit Board (PCB) within the footprint
of the package corresponding to the exposed metal pad or
exposed heat slug on the package, as shown in
Figure 5. The
solderable area on the PCB, as defined by the solder mask, should
be at least the same size/shape as the exposed pad/slug area on
the package to maximize the thermal/electrical performance.
Sufficient clearance should be designed on the PCB between the
outer edges of the land pattern and the inner edges of pad pattern
for the leads to avoid any shorts.
While the land pattern on the PCB provides a means of heat
transfer and electrical grounding from the package to the board
through a solder joint, thermal vias are necessary to effectively
conduct from the surface of the PCB to the ground plane(s). The
land pattern must be connected to ground through these vias.
The vias act as “heat pipes”. The number of vias (i.e. “heat pipes”)
are application specific and dependent upon the package power
dissipation as well as electrical conductivity requirements. Thus,
thermal and electrical analysis and/or testing are recommended
to determine the minimum number needed. Maximum thermal
and electrical performance is achieved when an array of vias is
incorporated in the land pattern. It is recommended to use as
many vias connected to ground as possible. It is also
recommended that the via diameter should be 12 to 13mils (0.30
to 0.33mm) with 1oz copper via barrel plating. This is desirable to
avoid any solder wicking inside the via during the soldering process
which may result in voids in solder between the exposed pad/
slug and the thermal land. Precautions should be taken to
eliminate any solder voids between the exposed heat slug and
the land pattern. Note: These recommendations are to be used
as a guideline only. For further information, refer to the Application
Note on the
Surface Mount Assembly of Amkor’s Thermally/
Electrically Enhance Leadfame Base Package, Amkor Technology.
GROUND PLANE
LAND PATTERN
SOLDER
THERMAL VIA
EXPOSED HEAT SLUG
(GROUND PAD)
PIN
PIN PAD
SOLDER
PIN
PIN PAD
SOLDER
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 844256CK-24LF | 制造商:Integrated Device Technology Inc 功能描述:LVDS 0.385V 32PIN VFQFN - Rail/Tube |
| 844256CK-24LFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Synthesizer Single 32-Pin VFQFPN EP T/R 制造商:Integrated Device Technology Inc 功能描述:32 VFQFN (LEAD-FREE) - Tape and Reel |
| 844256DGILF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 844256DGILFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 844256DGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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