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参数资料
| 型号： | 9248BF-138LF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, GREEN, MO-118, SSOP-48 |
| 文件页数： | 7/14页 |
| 文件大小： | 142K |
| 代理商： | 9248BF-138LF |
2
ICS9248-138
0342C—08/26/03
General Description
Pin Configuration
The ICS9248-138 is the single chip clock solution for designs using the 810/810E and Solano style chipset. It provides
all necessary clock signals for such a system.
Spread spectrum may be enabled through I
2C programming. Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-138
employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and
temperature variations.
Serial programming I
2C interface allows changing functions, stop clock programming and frequency selection.
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
SEL24_48MHz#
IN
Logic inputs frequency select I/O/USB output,
When a "0" is latched, output frequency = 48MHz
When a "1" is latched, output frequency = 24MHz
REF0
OUT
14.318 MHz reference clock.
2, 10, 11, 18, 25,
30, 38
VDD
PWR
3.3V Power supply for SDRAM output buffers, PCI output buffers, reference
output buffers and 48MHz output
3
X1
IN
Crystal input,nominally 14.318MHz.
4
X2
OUT
Crystal output, nominally 14.318MHz.
5, 6, 14, 21, 29, 34,
42
GND
PWR
Ground pin for 3V outputs.
9, 8, 7
3V66 [2:0]
OUT
3.3V Clocks
FS0
IN
Frequency select pin.
PCICLK0
OUT
PCI clock output
FS1
IN
Frequency select pin.
PCICLK1
OUT
PCI clock output
20, 19, 17, 16, 15
PCICLK [6:2]
OUT
PCI clock outputs.
22
PD#
IN
Asynchronous active low input pin used to power down the device into a low
power state. The internal clocks are disabled and the VCO and the crystal are
stopped. The latency of the power down will not be greater than 3ms.
23
SCLK
IN
Clock input of I2C input, 5V tolerant input
24
SDATA
IN
Data input for I2C serial input, 5V tolerant input
FS4
IN
Frequency select pin.
48MHz
OUT
48MHz output clocks
FS3
IN
Frequency select pin.
48MHz
OUT
48MHz output clocks
FS2
IN
Frequency select pin.
24_48MHz
OUT
24 or 48MHz output
31
SDRAM_F
OUT
Free running SDRAM - used for feed back to chipset, should remain on always.
32, 33, 35, 36, 37,
39, 40, 41,
SDRAM [7:0]
OUT
SDRAM clock outputs
43
GNDLCPU
PWR
Ground pin for the CPU clocks.
44, 45
CPUCLK [1:0]
OUT
CPU clock outputs.
46
VDDLCPU
PWR
Power pin for the CPUCLKs. 2.5V
47
IOAPIC
OUT
2.5V clock output
48
VDDLAPIC
PWR
Power pin for the IOAPIC. 2.5V
1
26
28
12
13
27
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9248BF-195LF | 制造商:Integrated Device Technology Inc 功能描述:PLL FREQ GENERATOR DUAL 48SSOP - Bulk |
| 9248BF-81LF | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 9248BF-81LFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 9248DF-39LF | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| 9248DF-39LFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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