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参数资料
| 型号： | 9250CF-10LFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封装： | 0.300 INCH, GREEN, SSOP-56 |
| 文件页数： | 13/18页 |
| 文件大小： | 452K |
| 代理商： | 9250CF-10LFT |
4
ICS9250- 10
Power Down Waveform
Note
1. After PD# is sampled active (Low) for 2 consective rising edges of CPUCLKs, all
the output clocks are driven Low on their next High to Low tranistiion.
2. Power-up latency <3ms.
3. Waveform shown for 100MHz
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Maximum Allowed Current
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