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参数资料
| 型号： | 9DB102AGILF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, PDSO20 |
| 封装： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件页数： | 7/13页 |
| 文件大小： | 223K |
| 代理商： | 9DB102AGILF |
IDTTM
Two Output Differential Buffer for PCIe Gen1 & Gen2
852
REV J 01/15/10
ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
3
Absolute Max
Symbol
Parameter
Min
Max
Units
VDDA
3.3V Core Supply Voltage
VDD + 0.5V
V
VDD
3.3V Output Supply Voltage
GND - 0.5
VDD + 0.5V
V
Ts
Storage Temperature
-65
150
°C
Tcase
Case Temperature
115
°C
ESD prot
Input ESD protection
human body model
2000
V
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = Tambient; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Tambcom
Commercial range
0
70
°C
1
Tambind
Industrial range
-40
85
°C
1
Input High Voltage
VIH
3.3 V +/-5%
2
VDD + 0.3
V
1
Input Low Voltage
VIL
3.3 V +/-5%
VSS - 0.3
0.8
V
1
Input High Current
IIH
VIN = VDD
-5
5
uA
1
IIL1
VIN = 0 V; Inputs with no pull-
up resistors
-5
uA
1
IIL2
VIN = 0 V; Inputs with pull-up
resistors
-200
uA
1
Full Active, CL = Full load;
75
100
mA
1
all differential pairs tri-stated
27
50
mA
1
Input Frequency
3
Fi
VDD = 3.3 V
80
100
105
MHz
1
Pin Inductance
1
Lpin
7nH
1
CIN
Logic Inputs
5
pF
1
COUT
Output pin capacitance
4.5
pF
1
Clk Stabilization
1,2
TSTAB
From VDD Power-Up to 1st
clock
1.8
ms
1
Modulation Frequency
Triangular Modulation
30
33
kHz
1
Spread Spectrum Modulation
Frequency
fMOD
Lexmark Modulation
25
45
KHz
1
PLL Bandwidth when
PLL_BW=0
400
KHz
1
PLL Bandwidth when
PLL_BW=1
1.2
MHz
1
SMBus Voltage
VDD
2.7
5.5
V
1
Low-level Output Voltage
VOLSMBUS
@ IPULLUP
0.4
V
1
Current sinking at VOL = 0.4 V
IPULLUP
SMBus SDATA pin
4
mA
1
SCLK/SDATA
Clock/Data Rise Time
TRI2C
(Max VIL - 0.15) to (Min VIH + 0.15)
1000
ns
1
SCLK/SDATA
Clock/Data Fall Time
TFI2C
(Min VIH + 0.15) to (Max VIL - 0.15)
300
ns
1
1Guaranteed by design and characterization, not 100% tested in production.
Tambient
PLL Bandwidth
BW
Input Low Current
Input Capacitance
1
Operating Supply Current
IDD3.3OP
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9DB102BFILF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Two Output Differential Buffer for PCIe Gen1 & Gen2 |
| 9DB102BFILFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Two Output Differential Buffer for PCIe Gen1 & Gen2 |
| 9DB102BFLF | 功能描述:时钟缓冲器 2 OUTPUT PCIE GEN2 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB102BFLFT | 功能描述:时钟缓冲器 2 OUTPUT PCIE GEN2 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB102BGILF | 功能描述:时钟缓冲器 2 OUTPUT PCIE GEN2 BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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