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参数资料
| 型号： | 9DB108BFLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | ROHS COMPLIANT, MO-118, SSOP-48 |
| 文件页数： | 13/16页 |
| 文件大小： | 144K |
| 代理商： | 9DB108BFLF-T |
6
Integrated
Circuit
Systems, Inc.
ICS9DB108
(Not recommended for new designs)
0723G—12/02/08
Electrical Characteristics - DIF 0.7V Current Mode Differential Pair
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2, RP=49.9, ΙREF = 475
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Current Source Output
Impedance
Zo
1
VO = Vx
3000
1
Voltage High
VHigh
660
850
1,3
Voltage Low
VLow
-150
150
1,3
Max Voltage
Vovs
1150
1
Min Voltage
Vuds
-300
1
Crossing Voltage (abs)
Vcross(abs)
250
550
mV
1
Crossing Voltage (var)
d-Vcross
Variation of crossing over all
edges
140
mV
1
Long Accuracy
ppmsee Tperiod min-max values
0
ppm1,2
200MHz nominal
4.9985
5.0015
ns
2
200MHz spread
4.9985
5.0266
ns
2
166.66MHz nominal
5.9982
6.0018
ns
2
166.66MHz spread
5.9982
6.0320
ns
2
133.33MHz nominal
7.4978
7.5023
ns
2
133.33MHz spread
7.4978
5.4000
ns
2
100.00MHz nominal
9.9970
10.0030
ns
2
100.00MHz spread
9.9970
10.0533
ns
2
200MHz nominal
4.8735
ns
1,2
166.66MHz nominal/spread
5.8732
ns
1,2
133.33MHz nominal/spread
7.3728
ns
1,2
100.00MHz nominal/spread
9.8720
ns
1,2
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700
ps
1
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700
ps
1
Rise Time Variation
d-tr
125
ps
1
Fall Time Variation
d-tf
125
ps
1
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55
%
1
Skew
tsk3
VT = 50%
50
ps
1
PLL mode,
Measurement from differential
wavefrom
50
ps
1
BYPASS mode as additive jitter
50
ps
1
1Guaranteed by design and characterization, not 100% tested in production.
3I
REF = VDD/(3xRR). For RR = 475 (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50.
Statistical measurement on single
ended signal using oscilloscope
math function.
mV
Measurement on single ended
signal using absolute value.
mV
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that the input clock
complies with CK409/CK410 accuracy requirements
Tperiod
Average period
Absolute min period
Tabsmin
Jitter, Cycle to cycle
tjcyc-cyc
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