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参数资料
| 型号： | 9DB108YGT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-48 |
| 文件页数： | 14/16页 |
| 文件大小： | 144K |
| 代理商： | 9DB108YGT |
7
Integrated
Circuit
Systems, Inc.
ICS9DB108
(Not recommended for new designs)
0723G—12/02/08
General SMBus serial interface information for the ICS9DB108
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address DC
(h)
ICS clock will
acknowledge
Controller (host) sends the begining byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address DC
(h)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address DD
(h)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(h)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
ICS (Slave/Receiver)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X
By
te
Index Block Write Operation
Slave Address DC(h)
Beginning Byte = N
WRite
starT bit
Controller (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
P
stoP bit
Slave Address DD(h)
Index Block Read Operation
Slave Address DC(h)
Beginning Byte = N
ACK
Data Byte Count = X
ACK
ICS (Slave/Receiver)
Controller (Host)
X
By
te
ACK
相关PDF资料 |
PDF描述 |
|---|---|
| 9DB108YFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB108YFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB108YGLNT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB108YFLNT | 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9DB1200CGLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 9DB1200BGLF | 制造商:Integrated Device Technology Inc 功能描述:PCIE GEN2 BUFFERS - Rail/Tube |
| 9DB1200C | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Twelve Output Differential Buffer for PCIe Gen1/Gen2, QPI, and FBDIMM |
| 9DB1200CGLF | 功能描述:时钟缓冲器 12 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB1200CGLFT | 功能描述:时钟缓冲器 12 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9DB1233 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Twelve Output Differential Buffer for PCIe Gen3 |
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