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参数资料
| 型号： | 9FG104DFLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28 |
| 文件页数： | 14/17页 |
| 文件大小： | 161K |
| 代理商： | 9FG104DFLF |
IDT
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
1541C—12/16/10
ICS9FG104D
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
6
Electrical Characteristics - REF-14.318/25 MHz
TA = TAM BIENT; VDD = 3.3 V +/-5%;RS=33 CL = 5 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS Notes
Long Accuracy
ppm
see Tperiod min-max values
ppm
1,2
14.318MHz output nominal
ns
1,2
25.000MHz output nominal
ns
1,2
Output High Voltage
VOH
IOH = -1 mA
2.4
V
1
Output Low Voltage
VOL
IOL = 1 mA
0.4
V
1
Output High Current
IOH
VOH @MIN = 1.0 V,
VOH@MAX = 3.135 V
-29
-23
mA
1
Output Low Current
IOL
VOL @MIN = 1.95 V,
VOL @MAX = 0.4 V
29
27
mA
1
Rise Time
tr1
VOL = 0.4 V, VOH = 2.4 V
1
1.6
2.5
ns
1
Fall Time
tf1
VOH = 2.4 V, VOL = 0.4 V
1
1.6
2.5
ns
1,2
Duty Cycle
dt1
VT = 1.5 V
45
52.5
55
%
1,2
Jitter
tjcyc-cycCOM
VT = 1.5 V (commerical)
150
200
ps
1
Jitter
tjcyc-cycIND
VT = 1.5 V (commerical)
400
600
ps
1
1Guaranteed by design and characterization, not 100% tested in production.
0
69.8413
40.0000
2 Trim capacitors must be used to tune the REF to the exact Crystal Frequency.
Clock period
Tperiod
Electrical Characteristics - Differential Phase Jitter Parameters
PARAMETER
Symbol
Conditions
Min
Typ
Max
Units
Notes
tjphasePLL
PCIe Gen 1
40
86
ps (p-p)
1,2
tjphaseLo
PCIe Gen 2
10kHz < f < 1.5MHz
1.2
3
ps
(RMS)
1,2
tjphaseHigh
PCIe Gen 2
1.5MHz < f < Nyquist (50MHz)
2.2
3.1
ps
(RMS)
1,2
tjphQPI
QPI 133MHz 4.8G/6.4Gb,12UI
0.25/0.2
0.5
ps
(RMS)
1,3
tjphFBD3.2G
FBD specs
(11 to 33MHz)
2.2
3
ps
(RMS)
1
tjphFBD4.8G
FBD specs
(11 to 33MHz)
1.8
2.5
ps
(RMS)
1
1Guaranteed by design and characterization, not 100% tested in production.
2See http://www.pcisig.com for compelte specs
3First number is 4.8G link speed, second number is 6.4G link speed. From Intel Clock Jit tool 1.5.1
Jitter, Phase
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 9FG104DFLFT | 功能描述:时钟合成器/抖动清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9FG104DGILF | 功能描述:时钟合成器/抖动清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9FG104DGILFT | 功能描述:时钟合成器/抖动清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9FG104DGLF | 功能描述:时钟合成器/抖动清除器 PCIE GEN2 SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9FG104DG-LF | 制造商:Integrated Device Technology Inc 功能描述:PROGRAMMABLE PLL FREQ TIMING GENERATOR SGL 28TSSOP - Rail/Tube |
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