参数资料
型号: 9FG108DFLF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封装: 0.300 INCH, ROHS COMPLIANT, MO-118, SSOP-48
文件页数: 3/18页
文件大小: 166K
代理商: 9FG108DFLF
IDTTM
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
1542E 12/16/10
ICS9FG108D
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
11
SMBus Table: Byte Count Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
BC7
RW
-
0
Bit 6
BC6
RW
-
0
Bit 5
BC5
RW
-
0
Bit 4
BC4
RW
-
0
Bit 3
BC3
RW
-
0
Bit 2
BC2
RW
-
1
Bit 1
BC1
RW
-
1
Bit 0
BC0
RW
-
1
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
X
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
X
Bit 1
X
Bit 0
X
SMBus Table: Reserved Register
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
X
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
X
Bit 1
X
Bit 0
X
SMBus Table: M/N Programming Enable
Pin #
Name
Control Function
Type
0
1
Default
Bit 7
M/N_EN
PLL M/N Programming
Enable
RW
Disable
Enable
0
Bit 6
OE_Polarity
Select Polarity of OE
inputs
RW
OE#
OE
1
Bit 5
REFOUT_En
Enables/Disables REF
RW
Disable
Enable
1
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Byte 6
Writing to this register
will configure how many
bytes will be read back,
default is 07 = 7 bytes.
-
5
Reserved
Byte 9
-
Reserved
Byte 7
Reserved
Byte 8
Reserved
相关PDF资料
PDF描述
9FG108DFILF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
9FG108DGLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
9FG108DGLF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
9FG1200DF-1LFT 400 MHz, OTHER CLOCK GENERATOR, PDSO56
9FG1200DG-1LF 400 MHz, OTHER CLOCK GENERATOR, PDSO56
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