- 您现在的位置：买卖IC网 > PDF目录25566 > 9FG1201HGLF (INTEGRATED DEVICE TECHNOLOGY INC) 400 MHz, OTHER CLOCK GENERATOR, PDSO56 PDF资料下载
参数资料
| 型号： | 9FG1201HGLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 400 MHz, OTHER CLOCK GENERATOR, PDSO56 |
| 封装： | 6.10 MM, 0.50 PITCH, ROHS COMPLIANT, MO-153, TSSOP-56 |
| 文件页数： | 1/23页 |
| 文件大小： | 268K |
| 代理商： | 9FG1201HGLF |
ICS9FG1201H
IDTTM/ICSTM
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD
1371F — 09/23/09
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, &
FBD
DATASHEET
1
Description
The ICS9FG1201H follows the Intel DB1200G Rev 1.0 Differential
Buffer Specification. This buffer provides 12 output clocks for CPU
Host Bus, PCI-Express, or Fully Buffered DIMM applications. The
outputs are configured with two groups. Both groups (DIF 9:0) and
(DIF 11:10) can be equal to or have a gear ratio to the input clock. A
differential CPU clock from a CK410B or CK410B+ main clock
generator, such as the ICS932S421, drives the ICS9FG1201. The
ICS9FG1201H can provide outputs up to 400MHz
Key Specifications
DIF output cycle-to-cycle jitter < 50ps
DIF output-to-output skew < 50ps within a group
DIF output-to-output skew < 100ps across all outputs
56-pin SSOP/TSSOP package
RoHS compliant packaging
Features/Benefits
Drives 2 channels of 4 FBDIMMs (total of 8 FBDIMMs)
Power up default is all outputs in 1:1 mode
DIF_(9:0) can be “gear-shifted” from the input CPU Host
Clock
DIF_(11:10) can be “gear-shifted” from the input CPU Host
Clock
Spread spectrum compatible
Supports output clock frequencies up to 400 MHz
8 Selectable SMBus addresses
SMBus address determines PLL or Bypass mode
Funtional Block Diagram
STOP
LOGIC
CLK_IN
CLK_IN#
DIF(9:0)
CONTROL
LOGIC
HIGH_BW#
SMB_A2_PLLBYP#
SMBDAT
SMBCLK
VTT_PWRGD#/PD
SPREAD
COMPATIBLE
PLL
10
IREF
OE(9:0)#
10
SMB_A0
SMB_A1
FS_A_410
STOP
LOGIC
DIF(11:10)
2
OE#
GEAR
SHIFT
LOGIC
SPREAD
COMPATIBLE
PLL
GEAR
SHIFT
LOGIC
相关PDF资料 |
PDF描述 |
|---|---|
| 9FG1201HGLFT | 400 MHz, OTHER CLOCK GENERATOR, PDSO56 |
| 9FG1901HKLFT | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72 |
| 9FG1901YKLF-T | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72 |
| 9FG1901YK-T | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72 |
| 9FG430AGILFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 9FG1201HGLFT | 功能描述:时钟缓冲器 12 Output PCIe Gearng Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9FG1900AK-1LF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG1900AK-1LF LOGIC AND TIMING MISC - Trays 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG1900AK-1LF Logic and Timing Misc |
| 9FG1900BK-1LF | 功能描述:时钟缓冲器 PCIE BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9FG1900BK-1LFT | 功能描述:时钟缓冲器 PCIE BUFFER RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| 9FG1901CKLF | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Dual 72-Pin VFQFPN EP Tray 制造商:Integrated Device Technology Inc 功能描述:PCIE BUFFER |
发布紧急采购，3分钟左右您将得到回复。