- 您现在的位置：买卖IC网 > PDF目录25570 > 9LPRS480YKLFT (INTEGRATED DEVICE TECHNOLOGY INC) PROC SPECIFIC CLOCK GENERATOR, PQCC64 PDF资料下载
参数资料
| 型号： | 9LPRS480YKLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PQCC64 |
| 封装： | ROHS COMPLIANT, PLASTIC, MLF-64 |
| 文件页数： | 13/25页 |
| 文件大小： | 249K |
| 代理商： | 9LPRS480YKLFT |
20
Integrated
Circuit
Systems, Inc.
ICS9LPRS480
1391D—02/02/09
SMBus Table: CPU PLL Frequency Control Register
Byte
12
Name
Control Function
Type
0
1
Default
Bit 7
N Div10
RW
X
Bit 6
N Div9
RW
X
Bit 5
N Div8
RW
X
Bit 4
N Div7
RW
X
Bit 3
N Div6
RW
X
Bit 2
N Div5
RW
X
Bit 1
N Div4
RW
X
Bit 0
N Div3
RW
X
SMBus Table: CPU PLL Spread Spectrum Control Register
Byte
13
Name
Control Function
Type
0
1
Default
Bit 7
SSP7
RW
X
Bit 6
SSP6
RW
X
Bit 5
SSP5
RW
X
Bit 4
SSP4
RW
X
Bit 3
SSP3
RW
X
Bit 2
SSP2
RW
X
Bit 1
SSP1
RW
X
Bit 0
SSP0
RW
X
SMBus Table: CPU PLL Spread Spectrum Control Register
Byte
14
Name
Control Function
Type
0
1
Default
Bit 7
X
Bit 6
SSP14
RW
X
Bit 5
SSP13
RW
X
Bit 4
SSP12
RW
X
Bit 3
SSP11
RW
X
Bit 2
SSP10
RW
X
Bit 1
SSP9
RW
X
Bit 0
SSP8
RW
X
SMBUS Table: CPU Output Divider Register
Byte
15
Name
Control Function
Type
0
1
Default
Bit 7
CPU NDiv0
LSB N Divider Programming
RW
X
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
CPUDiv3
RW
0000:/2 ; 0100:/4
1000:/8 ; 1100:/16
X
Bit 2
CPUDiv2
RW
0001:/3 ; 0101:/6
1001:/12 ; 1101:/24
X
Bit 1
CPUDiv1
RW
0010:/5 ; 0110:/10
1010:/20 ; 1110:/40
X
Bit 0
CPUDiv0
RW
0011:/15 ; 0111:/18
1011:/36 ; 1111:/72
X
SMBUS Table: SB_SRC Frequency Control Register
Byte
16
Name
Control Function
Type
0
1
Default
Bit 7
N Div2
N Divider Prog bit 2
RW
X
Bit 6
N Div1
N Divider Prog bit 1
RW
X
Bit 5
M Div5
RW
X
Bit 4
M Div4
RW
X
Bit 3
M Div3
RW
X
Bit 2
M Div2
RW
X
Bit 1
M Div1
RW
X
Bit 0
M Div0
RW
X
CPU M/N programming.
Reserved
N Divider Programming
b(10:3)
The decimal representation of M and N Divider in
Byte 11 and 12 will configure the VCO frequency.
Default at power up = Byte 3 Rom table. VCO
Frequency = 14.318 x Ndiv(10:0)/Mdiv(5:0) .
Reserved
Spread Spectrum
Programming b(7:0)
Bytes 13 and 14 set the CPU/HTT/SRC/ATIG
spread pecentage.Please contact ICS for the
appropriate values.
M Divider Programming
bit (5:0)
The decimal representation of M and N Divider in
Byte 16 and 17 configure the SB_SRC VCO
frequency. See M/N Caculation Tables for VCO
frequency formulas.
Spread Spectrum
Programming b(14:8)
Bytes 13 and 14 set the CPU/HTT/SRC/ATIG
spread pecentage.Please contact ICS for the
appropriate values.
CPU Divider Ratio
Programming Bits
相关PDF资料 |
PDF描述 |
|---|---|
| 9LPRS501SKLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC64 |
| 9LPRS501YKLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC64 |
| 9LPRS502YFLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56 |
| 9LPRS502YGLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56 |
| 9LPRS502YKLFT | SPECIALTY MICROPROCESSOR CIRCUIT, PQCC56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 9LPRS483AGLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS483AGLF GENERAL PURPOSE SEMICONDUCTORS - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS483AGLF General Purpose Semiconductors |
| 9LPRS485DGLF | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9LPRS485DGLFT | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| 9LPRS489CGLFT | 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS489CGLFT GENERAL PURPOSE SEMICONDUCTORS - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:IDT 9LPRS489CGLFT General Purpose Semiconductors |
| 9LPRS501HGLF | 制造商:Integrated Device Technology Inc 功能描述:PC CLOCK. TSSOP64 - Rail/Tube |
发布紧急采购，3分钟左右您将得到回复。