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参数资料
| 型号： | 9P035YFLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9P SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封装： | 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-8 |
| 文件页数： | 10/13页 |
| 文件大小： | 191K |
| 代理商： | 9P035YFLF-T |
IDTTM/ICSTM
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
ICS9P935
REV H
12/1/08
ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
6
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70°C; Supply Voltage AVDD, VDD = 2.5V ± 0.2V
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Current
IIH
VI = VDD or GND
5
A
Input Low Current
IIL
VI = VDD or GND
5
A
IDD2.5
CL = 0pf @ 200MHz
250
mA
IDDPD
CL = 0pf
100
A
Output High Current
IOH
VDD = 2.3V, VOUT = 1V
-18
-32
mA
Output Low Current
IOL
VDD = 2.3V, VOUT = 1.2V
26
35
mA
High Impedance
Output Current
IOZ
VDD=2.7V, Vout=VDD or GND
±10
mA
Input Clamp Voltage
VIK
VDDQ = 2.3V Iin = -18mA
-1.2
V
VDD = min to max,
IOH = -1 mA
VDDQ - 0.1
V
VDDQ = 2.3V,
IOH = -12 mA
1.7
V
VDD = min to max
IOL=1 mA
0.1
V
VDDQ = 2.3V
IOH=12 mA
0.6
V
Input Capacitance
1
CIN
VI = GND or VDD
3pF
Output Capacitance
1
COUT
VOUT = GND or VDD
3pF
Operating Supply
Current
High-level output
voltage
VOH
Low-level output voltage
VOL
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