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参数资料
| 型号： | 9P035YGLF-T |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9P SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封装： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-8 |
| 文件页数： | 7/13页 |
| 文件大小： | 191K |
| 代理商： | 9P035YGLF-T |
IDTTM/ICSTM
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
ICS9P935
REV H
12/1/08
ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
3
Absolute Max
Supply Voltage
-0.5V to 2.7V
Logic Inputs
GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature
0°C to +70°C
Case Temperature
115°C
Storage Temperature
–65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70°C; Supply Voltage AVDD, VDD = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Current
IIH
VI = VDD or GND
±250
A
Input Low Current
IIL
VI = VDD or GND
±10
A
Output Disabled Low
Current
IODL
OE = L, VODL = 100mV
100
A
IDD1.8
CL = 0pf @ 100MHz
300
mA
IDDLD
CL = 0pf
500
A
Input Clamp Voltage
VIK
VDDQ = 1.8V Iin = -18mA
-1.2
V
IOH = -100A
VDD -0.2
V
IOH = -9mA
1.1
V
IOL=100A
0.1
V
IOL=9mA
0.6
V
Input Capacitance
1
CIN
VI = GND or VDD
23
pF
Output Capacitance
1
COUT
VOUT = GND or VDD
23
pF
Operating Supply
Current
High-level output
voltage
VOH
Low-level output voltage
VOL
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