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参数资料
| 型号： | A28F400BR-T |
| 英文描述： | 4-MBIT (256K X 16. 512K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| 中文描述： | 4兆位（256 × 16。为512k × 8）SmartVoltage启动块闪存系列 |
| 文件页数： | 13/36页 |
| 文件大小： | 457K |
| 代理商： | A28F400BR-T |
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CUI will
respond to status reads and erase
suspend. After the WSM has completed its task, it
will set the WSM Status bit to a
“1,” which will also
allow the CUI to respond to its full command set.
Note that after the WSM has returned control to the
CUI, the CUI will stay in the current command state
until it receives another command.
A28F400BR-T/B
13
ADVANCE INFORMATION
Table 5. Command Set Codes and
Corresponding Device Mode
Command Codes
Device Mode
00
Invalid Reserved
10
Alternate Program
Set-Up
20
Erase Set-Up
40
Program Set-Up
50
Clear Status Register
70
Read Status Register
90
Intelligent Identifier
B0
Erase Suspend
D0
Erase Resume/Erase
Confirm
FF
Read Array
3.3.1.1
Command Function Description
Device operations are selected by writing specific
commands into the CUI.
Table
5 defines the
available commands.
Invalid/Reserved
These are unassigned commands and should not
be used. Intel reserves the right to redefine these
codes for future functions.
Read Array (FFH)
This single write cycle command points the read
path at the array. If the host CPU performs a
CE#/OE#-controlled Read immediately following a
two-write sequence that started the WSM, then the
device will output Status Register contents. If the
Read Array command is given after the Erase
Setup command, the device will reset to read the
array. A
two Read Array command sequence (FFH)
is required to reset to Read Array after the Program
Setup command.
Intelligent Identifier (90H)
After this command is executed, the CUI points the
output path to the intelligent identifier circuits. Only
intelligent identifier values at addresses 0 and 1 can
be read (only address A
is used in this mode, all
other address inputs are ignored).
Read Status Register (70H)
This is one of the two commands that is executable
while the WSM is operating. After this command is
written, a read of the device will output the contents
of the Status Register, regardless of the address
presented to the device.
The device automatically enters this mode after
program or erase has completed.
Clear Status Register (50H)
The WSM can only set the Program Status and
Erase Status bits in the Status Register to “1,” it
cannot clear them to “0.”
Two reasons exist for operating the Status Register
in this fashion. The first is synchronization. Since
the WSM does not know when the host CPU has
read the Status Register, it would not know when to
clear the status bits. Second, if the CPU is
programming a string of bytes, it may be more
efficient to query the Status Register after
programming the string. Thus, if any errors exist
while programming the string, the Status Register
will
return the accumulated error status.
相关PDF资料 |
PDF描述 |
|---|---|
| A28F400BX-B | 4-MBIT (256K x16. 512K x8) BOOT BLOCK FLASH MEMORY FAMILY |
| A28F400BR-TB | Toggle Switch; Circuitry:DPDT; Switch Operation:On-On; Contact Current Max:6A; Actuator Style:Bat; Switch Terminals:Through Hole; Current Rating:3A; Leaded Process Compatible:Yes; Mounting Type:PCB; Features:Standard Actuator RoHS Compliant: Yes |
| A28F400BX-T | 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY |
| A29-1 | 10 TO 1500 MHz CASCADABLE AMPLIFIER |
| A290011SERIES | 128K X 8 Bit CMOS 5.0 Volt-only. Boot Sector Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| A28F400BR-T/B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:A28F400BR-T/B |
| A28F400BR-TB | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT (256K X 16, 512K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| A28F400BX-B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:4-MBIT (256K x16. 512K x8) BOOT BLOCK FLASH MEMORY FAMILY |
| A28F400BX-T | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY |
| A28F400BX-T/B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:A28F400BX-T/B |
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