参数资料
| 型号： | A3946KLBTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 8/14页 |
| 文件大小： | 0K |
| 描述： | IC CTLR MOSFET 16-SOIC |
| 标准包装： | 1 |
| 应用： | DC 电机控制器，无刷（BLDC），3 相 |
| 输出数： | 1 |
| 电源电压： | 7 V ~ 60 V |
| 工作温度： | -40°C ~ 135°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 标准包装 |
| 其它名称： | 620-1294-6 |
A3946
Half-Bridge Power MOSFET Controller
Application Information
Bootstrap Capacitor Selection . C BOOT must be cor-
rectly selected to ensure proper operation of the device. If
too large, time is wasted charging the capacitor, with the
result being a limit on the maximum duty cycle and PWM
frequency. If the capacitor is too small, the voltage drop can
be too large at the time the charge is transferred from the
C BOOT to the MOSFET gate.
To keep the voltage drop small:
Q BOOT >> Q GATE
where a factor in the range of 10 to 20 is reasonable. Using
20 as the factor:
At power-up and when the drivers have been disabled for
a long time, the bootstrap capacitor can be completely
discharged. In this case, Delta_v can be considered to be the
full high-side drive voltage, 12 V. Otherwise, Delta_v is the
amount of voltage dropped during the charge transfer, which
should be 400 mV or less. The capacitor is charged whenever
the S pin is pulled low, via a GL PWM cycle, and current
? ows from VREG through the internal bootstrap diode
circuit to C BOOT .
Power Dissipation . For high ambient temperature
applications, there may be little margin for on-chip power
consumption. Careful attention should be paid to ensure that
and
Q BOOT = C BOOT × V BOOT = Q GATE × 20
C BOOT = Q GATE × 20 / V BOOT
the operating conditions allow the A3946 to remain in a safe
range of junction temperature.
The voltage drop on the BOOT pin, as the MOSFET is being
turned on, can be approximated by:
Delta_v = Q GATE / C BOOT
The power consumed by the A3946 can be estimated as:
P_total = Pd_bias + Pd_cpump + Pd_switching_loss
where:
For example, given a gate charge, Q GATE , of 160 nC, and the
typical BOOT pin voltage of 12 V, the value of the Boot
capacitor, C BOOT , can be determined by:
and
Pd_bias = V BB × I VBB , typically 3 mA,
C BOOT = (160 nC × 20) / 12 V ≈ 0.266 μ F
Therefore, a 0.22 μ F ceramic (X7R) capacitor can be chosen
for the Boot capacitor.
Pd_cpump = (2V BB – V REG ) I AVE , for V BB < 15 V, or
Pd_cpump = (V BB – V REG ) I AVE , for V BB > 15 V,
in either case, where
In that case, the voltage drop on the BOOT pin, when the
high-side MOSFET is turned on, is:
and
I AVE = Q GATE × 2 × f PWM
Delta_v = 160 nC / 0.22 μ F = 0.73 V
Pd_switching_loss = Q GATE
× V REG × 2 × f PWM Ratio,
Bootstrap Charging . It is good practice to ensure that the
high-side bootstrap capacitor is completely charged before a
high-side PWM cycle is requested.
The time required to charge the capacitor can be approxi-
mated by:
t CHARGE = C BOOT (Delta_v / 100 mA)
where
Ratio = 10 Ω / (R GATE + 10 Ω ).
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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