参数资料
型号: A3959SLP-T
厂商: Allegro Microsystems Inc
文件页数: 7/12页
文件大小: 0K
描述: IC MOTOR DRIVER PWM FULL 28TSSOP
标准包装: 50
应用: PWM 电机驱动器
输出数: 1
电流 - 输出: ±3A
电压 - 负载: 9.5 V ~ 50 V
电源电压: 4.5 V ~ 5.5 V
工作温度: -20°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 管件
其它名称: 620-1071
A3959
DMOS Full-Bridge PWM Motor Driver
FUNCTIONAL DESCRIPTION (continued)
Internal Current-Control Mode. Inputs PFD1 and
PFD2 determine the current-decay method after an
overcurrent event is detected at the SENSE input. In slow-
decay mode, both sink drivers are turned on for the ? xed
off-time period. Mixed-decay mode starts out in fast-decay
mode for a portion (15% or 48%) of the ? xed off time, and
then is followed by slow decay for the remainder of the
period.
PFD2 PFD1 % t off Decay
the appropriate pair of DMOS outputs during the current
decay and effectively short out the body diodes with the
low r DS(on) driver. This will reduce power dissipation
signi ? cantly and can eliminate the need for external
Schottky diodes.
Synchronous recti ? cation will prevent reversal of load
current by turning off all outputs when a zero-current level
is detected.
Shutdown. In the event of a fault (excessive junction
0
0
1
1
0
1
0
1
0
15
48
100
Slow
Mixed
Mixed
Fast
temperature, or low voltage on CP or V REG ) the outputs of
the device are disabled until the fault condition is removed.
At power up, and in the event of low V DD , the UVLO
circuit disables the drivers.
Braking. The braking function is implemented by
PWM Blank Timer. When a source driver turns on, a
current spike occurs due to the reverse-recovery currents
of the clamp diodes and/or switching transients related to
distributed capacitance in the load. To prevent this current
spike from erroneously resetting the source-enable latch,
the sense comparator is blanked. The blank timer runs
after the off-time counter to provide the blanking function.
The blank timer is reset when ENABLE is chopped or
PHASE is changed. For external PWM control, a PHASE
change or ENABLE on will trigger the blanking function.
The duration is determined by the BLANK input and the
oscilator.
driving the device in slow-decay mode via EXTMODE
and applying an enable chop command. Because it is
possible to drive current in either direction through the
DMOS drivers, this con ? guration effectively shorts out
the motor-generated BEMF as long as the ENABLE
chop mode is asserted. It is important to note that the
internal PWM current-control circuit will not limit the
current when braking, because the current does not ? ow
through the sense resistor. The maximum brake current
can be approximated by V BEMF /R L . Care should be taken
to ensure that the maximum ratings of the device are not
exceeded in worst-case braking situations of high speed
BLANK
t blank
and high inertial loads.
0 6/f osc
1 12/f osc
Synchronous Recti ? cation. When a PWM off cycle
is triggered, either by an ENABLE chop command or
internal ? xed off-time cycle, load current will recirculate
according to the decay mode selected by the control logic.
The A3959 synchronous recti ? cation feature will turn on
SLEEP Logic. The SLEEP input terminal is used to
minimize power consumption when when not in use.
This disables much of the internal circuitry including the
regulator and charge pump. Logic low will put the device
into sleep mode, logic high will allow normal operation.
Note: If the sleep mode is not used, connect a 5 k Ω pull-
up resistor between the SLEEP terminal and V DD .
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
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