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参数资料
| 型号： | A3959SLP-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRIVER PWM FULL 28TSSOP |
| 标准包装： | 50 |
| 应用： | PWM 电机驱动器 |
| 输出数： | 1 |
| 电流 - 输出： | ±3A |
| 电压 - 负载： | 9.5 V ~ 50 V |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 管件 |
| 其它名称： | 620-1071 |
A3959
DMOS Full-Bridge PWM Motor Driver
Package B (DIP)
Package LB (SOIC)
Package LP (TSSOP)
CP 2
CP 1
1
2
CHARGE PUMP
24
23
CP
V REG
CP
CP 2
1
2
24
23
V REG
SLEEP
CP
CP 2
1
2
28
27
GROUND
V REG
PHASE
ROSC
GROUND
3
4
5
? θ
V BB
22
21
20
SLEEP
OUT B
LOAD
SUPPLY
CP 1
PHASE
ROSC
3
4
5
NC
V BB
22
21
20
NO
CONNECTION
OUT B
LOAD SUPPLY
CP 1
NC
PHASE
ROSC
3
4
5
6
NC
V BB
26
25
24
23
SLEEP
NO
CONNECTION
OUT B
LOAD SUPPLY
GROUND
GROUND
6
7
19
18
GROUND
GROUND
GROUND
GROUND
6
7
19
18
GROUND
GROUND
GROUND
GROUND
7
8
22
21
NC
SENSE
GROUND
LOGIC
SUPPLY
8
9 9
V DD
17
16
SENSE
OUT A
LOGIC SUPPLY
ENABLE
8
9
V DD
17
16
SENSE
OUT A
LOGIC SUPPLY
ENABLE
9
10
V DD
20
19
NC
NC
ENABLE
PFD 2
BLANK
10
11
12
÷ 10
PWM TIMER
15
14
13
EXT MODE
REF
PFD 1
PFD 2
BLANK
PFD 1
10
11
12
÷ 10
NC
15
14
13
NO
CONNECTION
EXT MODE
REF
NC
PFD 2
BLANK
PFD 1
11
12
13
14
÷ 10
NC
18
17
16
15
OUT A
NO
CONNECTION
EXT MODE
REF
Dwg. PP-069-5A
Dwg. PP-069-4
Terminal List
Terminal Name
CP
CP1 & CP2
NC
PHASE
ROSC
GROUND
LOGIC SUPPLY
ENABLE
NC
PFD2
BLANK
PFD1
REF
EXT MODE
NO CONNECT
OUTA
NC
SENSE
NC
GROUND
LOAD SUPPLY
OUTB
NO CONNECT
SLEEP
VREG
GROUND
Terminal Description
Reservoir capacitor (typically 0.22 μ F)
The charge pump capacitor (typically 0.22 μ F)
No (internal) connection
Logic input for direction control
Oscillator resistor
Grounds
VDD, the low voltage (typically 5 V) supply
Logic input for enable control
No (internal) connection
Logic-level input for fast decay
Logic-level input for blanking control
Logic-level input for fast decay
VREF, the load current reference input voltage
Logic input for PWM mode control
No (Internal) connection
One of two DMOS bridge outputs to the motor
No (internal) connection
Sense resistor
No (internal) connection
Grounds
VBB, the high-current, 9.5 V to 50 V, motor supply
One of two DMOS bridge outputs to the motor
No (Internal) connection
Logic-level Input for sleep operation
Regulator decoupling capacitor (typically 0.22 μ F)
Ground
B (DIP)
24
1&2
—
3
4
5, 6, 7, 8*
9
10
–
11
12
13
14
15
—
16
–
17
–
18, 19*
20
21
—
22
23
—
LB (SOIC)
1
2&3
—
4
5
6, 7
8
9
–
10
11
12
13
14
15
16
–
17
–
18, 19
20
21
22
23
24
—
LP (TSSOP)
1
2&3
4
5
6
7, 8*
9
10
11
12
13
14
15
16
17
18
19, 20
21
22
—
23
24
25
26
27
28*
* For the B (DIP) package only, there is an indeterminate resistance between the substrate grounds (pins 6, 7, 18, and 19) and the grounds at pins 5
and 8. Pins 5 and 8, and 6, 7, 18, or 19 must be connected together externally. For the LP (TSSOP) package, the grounds at terminals 7, 8, and 28
should be connected together at the exposed pad beneath the device.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
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| A3959SLP-T | 制造商:Allegro MicroSystems 功能描述:Motor Driver IC |
| A3959SLPTR | 功能描述:IC MOTOR DRIVER PWM FULL 28TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 电机和风扇控制器，驱动器 系列:- 标准包装:1 系列:- 应用:直流电机驱动器，步进电机驱动器 评估套件:- 输出数:1 或 2 电流 - 输出:750mA 电压 - 负载:10 V ~ 40 V 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-BFSOP（0.295"，7.50mm 宽） 供应商设备封装:24-SOP 包装:Digi-Reel® 其它名称:MTS62C19A-HS105DKR |
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