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参数资料
| 型号： | A42L2604SERIES |
| 英文描述： | 4M X 4 CMOS DYNAMIC RAM WITH EDO PAGE MODE |
| 中文描述： | 4米× 4的CMOS动态RAM与江户页面模式 |
| 文件页数： | 8/25页 |
| 文件大小： | 259K |
| 代理商： | A42L2604SERIES |
A42L2604 Series
PRELIMINARY
(November, 2001, Version 0.2)
7
AMIC Technology, Inc.
AC Characteristics
(continued)
(VCC = 3.3V
±
10%, VSS = 0V, Ta = 0
°
C to +70
°
C or -40
°
C to +85
°
C)
Test Conditions:
Input timing reference level: V
IH
/V
IL
=2.0V/0.8V
Output reference level: V
OH
/V
OL
=2.0V/0.8V
Output Load: 2TTL gate + CL (50pF)
Assumed t
T
=2ns
-45
-50
#
Std
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
Notes
20
t
RRH
Read Command Hold Time Reference to RAS
0
-
0
-
ns
9
21
t
RAL
Column Address to RAS Lead Time
20
-
22
-
ns
22
t
COH
Output Hold After CAS Low
-
2
-
3
ns
23
t
OFF
Output Buffer Turn-Off Delay Time
-
2
-
3
ns
8, 10
24
t
ASC
Column Address Setup Time
0
-
0
-
ns
25
t
CAH
Column Address Hold Time
7
-
8
-
ns
26
t
OES
OE
Low to CAS High Set Up
10
-
10
-
ns
27
t
WCS
Write Command Setup Time
0
-
0
-
ns
11
28
t
WCH
Write Command Hold Time
7
-
8
-
ns
11
29
t
WCR
Write Command Hold Time to RAS
40
-
45
-
ns
30
t
WP
Write Command Pulse Width
7
-
8
-
ns
31
t
RWL
Write Command to RAS Lead Time
12
-
13
-
ns
32
t
CWL
Write Command to CAS Lead Time
7
-
8
-
ns
33
t
DS
Data-in setup Time
0
-
0
-
ns
34
t
DH
Data-in Hold Time
7
-
8
-
ns
35
t
DHR
Data-in Hold Time to RAS
40
-
45
-
ns
36
t
RWC
Read-Modify-Write Cycle Time
104
-
114
-
ns
37
t
RWD
RAS to WE Delay Time (Read-Modify-Write)
59
-
65
-
ns
11
38
t
CWD
CAS to WE Delay Time (Read-Modify-Write)
26
-
28
-
ns
11
39
t
AWD
Column Address to WE Delay Time
(Read-Modify-Write)
34
-
37
-
ns
11
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相关代理商/技术参数 |
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| A42L2604V-45 | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:4M X 4 CMOS DYNAMIC RAM WITH EDO PAGE MODE |
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