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参数资料
| 型号： | A8698ELJTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 12/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 20 V |
| 输入电压： | 8 V ~ 25 V |
| PWM 型： | 电流模式 |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 产品目录页面： | 1142 (CN2011-ZH PDF) |
| 其它名称： | 620-1177-6 |
A8698
Package LJ 8-Pin SOIC
Wide Input Voltage 3.0 A Step Down Regulator
6.20 .244
5.80 .228
0.25 [.010] M B M
8
5.00 .197
4.80 .189
A
B
8o
0o
0.25 .010
0.17 .007
4.00 .157
B
3.80 .150
2.41 .095
A
NOM
1.27 .050
0.40 .016
3.30 .130
NOM
1
2
0.25 .010
8X
0.10 [.004] C
0.51 .020
8X
0.31 .012
SEATING
PLANE
1.75 .069
1.35 .053
C
SEATING PLANE
GAUGE PLANE
0.25 [.010] M C A B
1.27 .050
0.65 .026
MAX
1.75 .069
NOM
0.25 .010
0.10 .004
1.27 .050
NOM
All dimensions reference, not for tooling use
(reference JEDEC MS-012 AA)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
2X 0.20 .008
MIN
C
2.41 .095
NOM
5.60 .220
NOM
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
C Reference land pattern layout (reference IPC7351
SOIC127P600X175-9AM); adjust as necessary to meet
application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
1
2
6X 0.20 .008
3.30 .130
NOM
MIN
Pin-out Diagram
Terminal L ist Tabl e
BOOT
ENB
TSET
GND
1
2
3
4
Pad
(Top View)
8
7
6
5
VIN
LX
VBIAS
FB
Number
1
2
3
4
5
6
7
8
–
Name
BOOT
ENB
TSET
GND
FB
VBIAS
LX
VIN
Pad
Description
Gate drive boost node
On/off control; logic input
Off-time setting
Ground
Feedback for adjustable regulator
Bias supply input
Buck switching node
Supply input
Exposed pad for enhanced thermal dissipation
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reli-
ability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support appliances, devices, or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringements of patents or
other rights of third parties that may result from its use.
Copyright ? 2006-2013 Allegro MicroSystems, LLC
Allegro MicroSystems, LLC
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
12
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