- 您现在的位置：买卖IC网 > PDF目录1888 > AD1934WBSTZ-RL (Analog Devices Inc)IC DAC 8CH W/ON-CHIP PLL 48LQFP PDF资料下载
参数资料
| 型号： | AD1934WBSTZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/28页 |
| 文件大小： | 0K |
| 描述： | IC DAC 8CH W/ON-CHIP PLL 48LQFP |
| 标准包装： | 2,000 |
| 位数： | 24 |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 8 |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 8 电压，单极 |
| 采样率（每秒）： | * |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
AD1934
Data Sheet
Rev. D | Page 16 of 28
DAISY-CHAIN MODE
The AD1934 also allows a daisy-chain configuration to expand
the system 16 DACs (see Figure 12). In this mode, the DBCLK
frequency is 512 fS. The first eight slots of the DAC TDM data
stream belong to the first AD1934 in the chain and the last eight
slots belong to the second AD1934. The second AD1934 is the
device attached to the DSP TDM port.
To accommodate 16 channels at a 96 kHz sample rate, the
AD1934 can be configured into a dual-line, DAC TDM mode,
as shown in Figure 13. This mode allows a slower DBCLK than
normally required by the one-line TDM mode.
Again, the first four channels of each TDM input belong to the
first AD1934 in the chain and the last four channels belong to
the second AD1934.
The dual-line, DAC TDM mode can also be used to send data at
a 192 kHz sample rate into the AD1934, as shown in Figure 14.
The I/O pins of the serial ports are defined according to the
serial mode selected. See Table 13 for a detailed description of
the function of each pin. See Figure 18 for a typical AD1934
configuration with two external stereo DACs. Figure 15 and
Figure 16 show the serial mode formats. For maximum
flexibility, the polarity of LRCLK and BCLK are programmable.
In these figures, all of the clocks are shown with their normal
polarity. The default mode is I2S.
DLRCLK
DBCLK
8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN
8 UNUSED SLOTS
8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN
MSB
DSDATA1 (TDM_IN)
OF THE SECOND AD1934
DSDATA2 (TDM_OUT)
OF THE SECOND AD1934
THIS IS THE TDM
TO THE FIRST AD1934
DAC L1
DAC R1
DAC L2
DAC R2
DAC L3
DAC R3
DAC L4
DAC R4
DAC L1
DAC R1
DAC L2
DAC R2
DAC L3
DAC R3
DAC L4
DAC R4
DAC L1
DAC R1
DAC L2
DAC R2
DAC L3
DAC R3
DAC L4
DAC R4
32 BITS
DSP
SECOND
AD1934
FIRST
AD1934
06
10
6-
05
4
Figure 12. Single-Line DAC TDM Daisy-Chain Mode (Applicable to 48 kHz Sample Rate, 16-Channel, Two AD1934 Daisy Chain)
DLRCLK
DBCLK
8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN
8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN
DSDATA1
(IN)
DAC L1
DAC R1
DAC L2
DAC R2
DAC L1
DAC R1
DAC L2
DAC R2
DSDATA3
(IN)
DAC L3
DAC R3
DAC L4
DAC R4
DAC L3
DAC R3
DAC L4
DAC R4
DSDATA2
(OUT)
DAC L1
DAC R1
DAC L2
DAC R2
DSDATA4
(OUT)
DAC L3
DAC R3
DAC L4
DAC R4
32 BITS
DSP
SECOND
AD1934
FIRST
AD1934
MSB
06
10
6-
05
5
Figure 13. Dual-Line, DAC TDM Mode (Applicable to 96 kHz Sample Rate, 16-Channel, Two AD1934 Daisy Chain; DSDATA3 and DSDATA4 Are the Daisy Chain)
相关PDF资料 |
PDF描述 |
|---|---|
| AD1937WBSTZ | IC CODEC 4/ADC DIFF OUT 64-LQFP |
| AD1938WBSTZ | IC CODEC 24BIT 4ADC/8DAC 48LQFP |
| AD1939WBSTZ-RL | AUDIO CODEC W/ON CHIP 4ADC 8DAC |
| AD1953YSTZ | IC DSP DAC AUDIO3CH/26BIT 48LQFP |
| AD1954YSTZRL | IC DAC AUDIO 3CHAN 26BIT 48LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD1934YSTZ | 功能描述:IC DAC 8CH W/ON-CHIP PLL 48LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD1934YSTZ-RL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD1935 | 制造商:AD 制造商全称:Analog Devices 功能描述:4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC |
| AD1935XSTZ | 制造商:AD 制造商全称:Analog Devices 功能描述:4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC |
| AD1935XSTZRL | 制造商:AD 制造商全称:Analog Devices 功能描述:4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC |
发布紧急采购，3分钟左右您将得到回复。