参数资料
| 型号： | AD421BRZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT LOOP 4-20MA 16SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1,000 |
| 设置时间： | 8ms |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 450mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电流，单极 |
AD421
–5–
REV. C
PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
REF OUT1
Reference Output 1. A precision +1.25 V reference is provided at this pin. It is intended as a precision ref-
erence source for other devices in the transmitter. REF OUT1 is a buffered output capable of providing up
to 0.5 mA to external circuitry. If REF OUT 1 is required to sink current, a resistive load of 100 k
to COM
should be added. (See Reference section.)
2
REF OUT2
Reference Output 2. A precision +2.5 V reference is provided at this pin. To operate the AD421 with its
own reference, REF OUT2 should be connected to REF IN. It can also be used as a precision reference
source for other devices in the transmitter. REF OUT2 is a buffered output capable of providing up to
0.5 mA to external circuitry.
3
REF IN
Voltage Reference Input. The reference voltage for the AD421 is applied to this pin and it sets the span for
the AD421. The nominal reference voltage for the AD421 is +2.5 V for correct operation. This can be sup-
plied using an external reference source or by using the part’s own REF OUT2 voltage.
4
LV
Regulated Voltage Control Input. The LV input controls the loop gain of the servo amplifier to set VCC.
With LV connected to COM, the regulator voltage is set to 5 V nominal. If the LV input is connected through
0.01
F to VCC, the regulated voltage is nominally 3.3 V. With LV connected to VCC the regulated voltage,
VCC, is 3 V nominal.
5
LATCH
DAC Latch Input. Logic Input. A rising edge of the LATCH signal loads the data from the serial input shift
register to the DAC latch and hence updates the output of the DAC. The number of clock cycles provided
between latch pulses determines whether the DAC is in alarm or normal current mode. (See Digital Inter-
face section.)
6
CLOCK
Data Clock Input. Data on the DATA input is clocked into the shift register on the rising edge of this
CLOCK input. The period of this clock equals the input serial data bit rate. This serial clock rate can be up
to 10 MHz. If 16 clock cycles are provided between LATCH pulses then the data on the DATA input is
accepted as normal 4–20 mA data. If more than 16 clock cycles are provided between LATCH pulses, the
data is assumed to be alarm current data (see Digital Interface section).
7
DATA
Data Input. The data to be loaded to the AD421 input shift register is applied to this input. Data should be
valid on the rising edge of the CLOCK input.
8
LOOP RTN
Loop Return Output. LOOP RTN is the return path for current flowing in the current loop.
9
COM
Common. This is the reference potential for the AD421 analog and digital inputs and outputs and for the
voltage regulator output.
10
C3
Filtering Capacitor. A low dielectric absorption capacitor ceramic capacitor should be connected between
this pin and COM for internal filtering of the switched current sources.
11
C2
Filtering Capacitor. See C3 description.
12
C1
Filtering Capacitor. See C3 description.
13
DRIVE
Output from the Voltage Regulator Loop. The DRIVE signal controls the external pass transistor to establish and
maintain the correct VCC level programmed by the LV inputs while providing the necessary bias as the loop cur-
rent is programmed from 4 mA to 20 mA.
14
COMP
Compensation Capacitor Input. A capacitor connected between COMP and DRIVE is required to stabilize
the feedback loop formed with the regulator op amp and the external pass transistor.
15
BOOST
This open collector pin sinks the necessary current from the loop so that the current flowing into BOOST
plus the current flowing into COM is equal to the programmed loop current.
16
VCC
Power Supply. VCC is the power supply input of the AD421 and it also provides the voltage regulator output,
driven by the external pass transistor. It is used both to bias the AD421 itself and to provide power for the
rest of the smart transmitter circuitry. The LV input determines the regulated voltage output to be either
3 V, 3.3 V or 5 V nominal. Alternatively, a separate power supply can be connected to this pin to power the
AD421. VCC should be decoupled to COM with a 2.2
F capacitor.
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| AD421BRZRL7 | 功能描述:IC DAC 16BIT LOOP 4-20MA 16SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
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| AD422-02E | 功能描述:SENSOR MAG SW 40G CROS AXS 8SOIC 制造商:nve corp/sensor products 系列:AD 包装:管件 零件状态:有效 功能:全极开关 技术:霍尔效应 极化:任意一种 感应范围:±5mT 跳闸，±2.5mT 释放 测试条件:-40°C ~ 125°C 电压 - 电源:4.5 V ~ 30 V 电流 - 电源（最大值）:4.5mA 电流 - 输出（最大值）:20mA 输出类型:开路集电极 特性:- 工作温度:-40°C ~ 125°C（TA） 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商器件封装:8-SOIC 标准包装:1,000 |
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