参数资料
型号: AD5300
厂商: Analog Devices, Inc.
英文描述: Rail-to-Rail Voltage Output 8-Bit DAC(满幅度电压输出8位D/A转换器)
中文描述: 轨至轨电压输出的8位DAC(满幅度电压输出8位的D / A转换器)
文件页数: 2/12页
文件大小: 221K
代理商: AD5300
–2–
REV. 0
AD5300–SPECIFICATIONS
(V
DD
= +2.7 V to +5.5 V; R
L
= 2 k
V
to GND; C
L
= 200 pF to GND; all specifications
T
MN
to T
MAX
unless otherwse noted)
B Version
1
T yp
Parameter
Min
Max
Units
Conditions/Comments
ST AT IC PERFORMANCE
2
Resolution
Relative Accuracy
Differential Nonlinearity
Zero Code Error
8
Bits
LSB
LSB
LSB
±
1
±
0.25
+3.5
See Figure 2.
Guaranteed Monotonic by Design. See Figure 3.
All Zeros Loaded to DAC
Register. See Figure 6.
All Ones Loaded to DAC
Register. See Figure 6.
+0.5
Full-Scale Error
–0.5
–3.5
LSB
Gain Error
Zero Code Error Drift
Gain T emperature Coefficient
±
1.25
% of FSR
μ
V/
°
C
ppm of FSR/
°
C
–20
–5
OUT PUT CHARACT ERIST ICS
3
Output Voltage Range
Output Voltage Settling T ime
0
V
DD
6
V
μ
s
4
1/4 Scale to 3/4 Scale Change (40 Hex to C0
Hex). See Figure 16.
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Feedthrough
DC Output Impedance
Short Circuit Current
1
20
0.5
1
50
20
2.5
5
V/
μ
s
nV-s
nV-s
mA
mA
μ
s
μ
s
1 LSB Change Around Major Carry. See Figure 19.
V
DD
= +5 V
V
DD
= +3 V
Coming Out of Power-Down Mode. V
DD
= +5 V
Coming Out of Power-Down Mode. V
DD
= +3 V
Power-Up T ime
LOGIC INPUT S
3
Input Current
V
INL
, Input Low Voltage
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
V
INH
, Input High Voltage
Pin Capacitance
±
1
0.8
0.6
μ
A
V
V
V
V
pF
V
DD
= +5 V
V
DD
= +3 V
V
DD
= +5 V
V
DD
= +3 V
2.4
2.1
3
POWER REQUIREMENT S
V
DD
I
DD
(Normal Mode)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.7 V to +3.6 V
I
DD
(Power-Down)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.7 V to +3.6 V
Power Efficiency
I
OUT
/I
DD
2.7
5.5
V
DAC Active and Excluding Load Current
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
140
115
250
200
μ
A
μ
A
0.2
0.05
1
1
μ
A
μ
A
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
93
%
I
LOAD
= 2 mA. V
DD
= +5 V
NOT ES
1
T emperature ranges are as follows: B Version: –40
°
C to +105
°
C.
2
Linearity
calculated using a reduced code range of 4 to 251 output unloaded.
3
Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
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