参数资料
| 型号： | AD5312ARMZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL R-R 10-MSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 50 |
| 设置时间： | 6µs |
| 位数： | 10 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 2.5mW |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电压，单极；2 电压，双极 |
| 采样率（每秒）： | 143k |
| 产品目录页面： | 782 (CN2011-ZH PDF) |
AD5302/AD5312/AD5322
Rev. D | Page 19 of 24
OPTO-ISOLATED INTERFACE FOR PROCESS
CONTROL APPLICATIONS
Each AD5302/AD5312/AD5322 has a versatile 3-wire serial
interface, making them ideal for generating accurate voltages in
process control and industrial applications. Due to noise, safety
requirements, or distance, it can be necessary to isolate the
AD5302/AD5312/AD5322 from the controller. This can easily
be achieved by using opto-isolators, which provide isolation in
excess of 3 kV. The serial loading structure of the AD5302/
AD5312/AD5322 makes them ideally suited for use in opto-
isolated applications. Figure 41 shows an opto-isolated interface
to the AD5302/AD5312/AD5322 where DIN, SCLK, and SYNC
are driven from opto-couplers. The power supply to the part
also needs to be isolated by using a transformer. On the DAC
side of the transformer, a 5 V regulator provides the 5 V supply
required for the AD5302/AD5312/AD5322.
SCLK
DIN
AD5302/AD5312/
AD5322
00
92
8-
0
41
SYNC
GND
5V
REGULATOR
POWER
VDD
10F
0.1F
VOUTA
VOUTB
VREFB
VREFA
VDD
10k
10k
DIN
SYNC
SCLK
VDD
Figure 41. AD5302/AD5312/AD5322 in an Opto-Isolated Interface
DECODING MULTIPLE AD5302/AD5312/AD5322s
The SYNC pin on the AD5302/AD5312/AD5322 can be used in
applications to decode a number of DACs. In this application,
all the DACs in the system receive the same serial clock and serial
data, but only the SYNC to one of the devices is active at any one
time, allowing access to two channels in this eight-channel system.
The 74HC139 is used as a 2-to-4 line decoder to address any of
the DACs in the system. To prevent timing errors from occurring,
the enable input should be brought to its inactive state while the
coded address inputs are changing state. Figure 42 shows a
diagram of a typical setup for decoding multiple AD5302/
AD5312/AD5322 devices in a system.
74HC139
ENABLE
CODED
ADDRESS
1G
1A
1B
DGND
1Y0
1Y1
1Y2
1Y3
SCLK
DIN
SCLK
DIN
SCLK
DIN
SCLK
DIN
SCLK
AD5302/AD5312/AD5322
SYNC
VCC
0092
8-
0
42
SYNC
AD5302/AD5312/AD5322
VDD
Figure 42. Decoding Multiple AD5302/AD5312/AD5322 Devices in a System
AD5302/AD5312/AD5322 AS A DIGITALLY
PROGRAMMABLE WINDOW DETECTOR
Figure 43 shows a digitally programmable upper-/lower-limit
detector using the two DACs in the AD5302/AD5312/AD5322.
The upper and lower limits for the test are loaded to DAC A
and DAC B, which, in turn, set the limits on the CMP04. If the
signal at the VIN input is not within the programmed window,
an LED indicates the fail condition.
5V
1/2
CMP04
FAIL
PASS
1/6 74HC05
VREF
SCLK
DIN
VOUTA
VDD
00
92
8-
0
43
AD5302/AD5312/
AD5322
VREFA
GND
0.1F
10F
1k
VIN
PASS/FAIL
DIN
SCLK
SYNC
VREFB
VOUTB
Figure 43. Window Detector Using AD5302/AD5312/AD5322
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| AD5312BRM | 功能描述:IC DAC 10BIT DUAL R-R OUT 10MSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| AD5312BRM-REEL | 功能描述:IC DAC 10BIT DUAL W/BUFF 10-MSOP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
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