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| 型号： | AD5338BRMZ-1REEL7 |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | 2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs |
| 中文描述： | SERIAL INPUT LOADING, 7 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| 封装： | ROHS COMPLIANT, MO-187AA, MSOP-8 |
| 文件页数： | 13/24页 |
| 文件大小： | 654K |
| 代理商： | AD5338BRMZ-1REEL7 |
AD5337/AD5338/AD5339
Rev. A | Page 13 of 24
0
50
100
150
200
250
300
I
D
μ
A
3.5
4.0
2.5
3.0
4.5
5.0
5.5
V
DD
(V)
0
+25°C
–40°C
+105°C
Figure 18. Supply Current vs. Supply Voltage
0
0.1
0.2
0.3
0.4
0.5
I
D
μ
A
3.5
4.0
2.5
3.0
4.5
5.0
5.5
V
DD
(V)
0
+25°C
–40°C
+105°C
Figure 19. Power-Down Current vs. Supply Voltage
0
50
100
150
200
250
I
D
μ
A
300
350
400
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
V
LOGIC
(V)
0
T
A
= 25°C
V
DD
= 5V
V
DD
= 3V
INCREASING
DECREASING
Figure 20. Supply Current vs. Logic Input Voltage for SDA and SCL Voltage
Increasing and Decreasing
0
T
A
= 25°C
V
DD
= 5V
V
REF
= 5V
V
OUT
A
SCL
CH1
CH1 1V, CH2 5V, TIME BASE = 1
μ
s/DIV
CH2
Figure 21. Half-Scale Settling (1/4 to 3/4 Scale Code Change)
0
T
A
= 25°C
V
DD
= 5V
V
REF
= 2V
V
OUT
A
V
DD
CH1
CH1 2V, CH2 200mV, TIME BASE = 200
μ
s/DIV
CH2
Figure 22. Power-On Reset to 0 V
0
T
A
= 25°C
V
DD
= 5V
V
REF
= 2V
V
OUT
A
SCL
CH1
CH1 500mV, CH2 5V, TIME BASE = 1
μ
s/DIV
CH2
Figure 23. Existing Power-Down to Midscale
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|---|---|
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