参数资料
| 型号： | AD5441BRMZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/17页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT SERIAL IN 8MSOP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 50 |
| 设置时间： | 500ns |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 55µW |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
| 输出数目和类型： | 1 电流，单极；1 电流，双极 |
| 采样率（每秒）： | * |
| 产品目录页面： | 782 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5541/42EBZ-ND - BOARD EVAL FOR AD5441/2 |
AD5441
Rev. A | Page 11 of 16
PARAMETER DEFINITIONS
GENERAL CIRCUIT INFORMATION
The AD5441 is a 12-bit multiplying DAC with a low
temperature coefficient. It contains an R-2R resistor ladder
network, data input and control logic, and two data registers.
The digital circuitry forms an interface in which serial data can
be loaded under microprocessor control into a 12-bit shift register
and then transferred, in parallel, to the 12-bit DAC register.
The analog portion of the AD5441 contains an inverted R-2R
ladder network consisting of silicon-chrome, highly stable
(50 ppm/°C), thin-film resistors, and 12 pairs of NMOS current-
steering switches, see Figure 21. These switches steer binarily
weighted currents into either IOUT or GND; this yields a constant
current in each ladder leg, regardless of digital input code. This
constant current results in a constant input resistance at VREF
equal to R. The VREF input may be driven by any reference voltage
or current, ac or dc, that is within the limits stated in the
10k
S1
20k
S2
20k
10k
S3
20k
10k
S12
20k
*
10k
BIT 1 (MSB)
BIT 2
BIT 3
BIT 12 (LSB)
RFEEDBACK
VREF
IOUT
GND
DIGITAL INPUTS
*THESE SWITCHES PERMANENTLY ON.
NOTES
1. SWITCHES SHOWN FOR DIGITAL INPUTS HIGH.
064
92-
02
1
*
Figure 21. Simplified DAC Circuit
The 12 output current steering NMOS FET switches are in
series with each R-2R resistor.
To further ensure accuracy across the full temperature range,
MOS switches that are always on were included in series with
the feedback resistor and the terminating resistor of the R-2R
ladder. Figure 21 shows the location of the series switches.
During any testing of the resistor ladder or RFEEDBACK (such as
incoming inspection), VDD must be present to turn on these
series switches.
OUTPUT IMPEDANCE
The output resistance of the AD5441, as in the case of the
output capacitance, varies with the digital input code. This
resistance, looking back into the IOUT terminal, may be between
10 kΩ (the feedback resistor alone when all digital inputs are
low) and 7.5 kΩ (the feedback resistor in parallel with approximate
30 kΩ of the R-2R ladder network resistance when any single bit
logic is high). Static accuracy and dynamic performance are
affected by these variations.
APPLICATIONS INFORMATION
In most applications, linearity depends upon the potential of
the IOUT and GND pins being at the same voltage potential. The
DAC is connected to an external precision op amp inverting input.
The external amplifiers noninverting input should be tied directly
to ground without the usual bias current compensating resistor (see
input bias current and low drift over temperature. The amplifiers
input offset voltage should be nulled to less than 200 mV (less than
10% of 1 LSB). All grounded pins should tie to a single common
ground point to avoid ground loops. The VDD power supply should
have a low noise level with adequate bypassing. It is best to operate
the AD5441 from the analog power supply and grounds.
UNIPOLAR 2-QUADRANT MULTIPLYING
The most straightforward application of the AD5441 is in the
2-quadrant multiplying configuration shown in Figure 22. If the
reference input signal is replaced with a fixed dc voltage reference,
the DAC output provides a proportional dc voltage output
according to the transfer equation
VOUT = D/4096 × VREF
where:
D is the decimal data loaded into the DAC register.
VREF is the externally applied reference voltage source.
06
49
2-
02
3
RFB
IOUT1
GND
CLK
SRI
VREF
R1
LD
AD5441
VDD
AGND
C1
A1
R2
VOUT = 0 TO –VREF
CONTROLLER
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 22. Unipolar (2-Quadrant) Operation
相关PDF资料 |
PDF描述 |
|---|---|
| D38999/20SC4PC | CONN RCPT 4POS WALL MNT W/PINS |
| AD7302BNZ | IC DAC 8BIT DUAL R-R 20-DIP |
| AD5623RBRMZ-3 | IC DAC NANO 12BIT DUAL 10-MSOP |
| VE-BNX-MV-F1 | CONVERTER MOD DC/DC 5.2V 150W |
| VI-201-MY-F2 | CONVERTER MOD DC/DC 12V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD5441BRMZ-REEL7 | 功能描述:IC DAC 12BIT SERIAL IN 8MSOP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色产品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 标准包装:91 系列:- 设置时间:4µs 位数:10 数据接口:MICROWIRE?，串行，SPI? 转换器数目:8 电压电源:单电源 功率耗散（最大）:2.7mW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-WFDFN 裸露焊盘 供应商设备封装:14-DFN-EP（4x3） 包装:管件 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD5442ABCPZ-1 | 制造商:AD 制造商全称:Analog Devices 功能描述:2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-/12-Bit nanoDACs in LFCSP |
| AD5442JR | 制造商:Analog Devices 功能描述: |
| AD5443 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5443BRM | 制造商:Analog Devices 功能描述:DAC SGL R-2R 12-BIT 10PIN USOIC - Bulk |
发布紧急采购，3分钟左右您将得到回复。