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| 型号： | AD5450YUJZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/28页 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT MULTIPLYING TSOT23-8 |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 设计资源： | Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) |
| 标准包装： | 10,000 |
| 位数： | 8 |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-8 薄型，TSOT-23-8 |
| 供应商设备封装： | TSOT-23-8 |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电流，单极；1 电流，双极 |
| 采样率（每秒）： | 2.7M |
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AD5450/AD5451/AD5452/AD5453
Data Sheet
Rev. G | Page 18 of 28
Stability
In the I-to-V configuration, the IOUT of the DAC and the
inverting node of the op amp must be connected as close as
possible, and proper PCB layout techniques must be employed.
Because every code change corresponds to a step function, gain
peaking may occur if the op amp has limited gain bandwidth
product (GBP) and there is excessive parasitic capacitance at the
inverting node. This parasitic capacitance introduces a pole into
the open-loop response, which can cause ringing or instability
in the closed-loop applications circuit.
An optional compensation capacitor, C1, can be added in parallel
small a value of C1 can produce ringing at the output, and too
large a value can adversely affect the settling time. C1 should be
found empirically, but 1 pF to 2 pF is generally adequate for the
compensation.
SINGLE-SUPPLY APPLICATIONS
Voltage-Switching Mode
Figure 46 shows these DACs operating in the voltage-switching
mode. The reference voltage, VIN, is applied to the IOUT1 pin, and
the output voltage is available at the VREF terminal. In this
configuration, a positive reference voltage results in a positive
output voltage, making single-supply operation possible. The
output from the DAC is voltage at a constant impedance (the
DAC ladder resistance); therefore, an op amp is necessary to
buffer the output voltage. The reference input no longer sees
constant input impedance, but one that varies with code;
therefore, the voltage input should be driven from a low
impedance source.
04587-011
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
RFB
VIN
IOUT1
VREF
GND
VDD
VOUT
R1
R2
Figure 46. Single-Supply Voltage-Switching Mode
It is important to note that with this configuration VIN is limited
to low voltages because the switches in the DAC ladder do not
have the same source-drain drive voltage. As a result, their on
resistance differs, which degrades the integral linearity of the
DAC. Also, VIN must not go negative by more than 0.3 V, or an
internal diode turns on, causing the device to exceed the
maximum ratings. In this type of application, the full range of
multiplying capability of the DAC is lost.
Positive Output Voltage
The output voltage polarity is opposite to the VREF polarity for
dc reference voltages. To achieve a positive voltage output, an
applied negative reference to the input of the DAC is preferred
over the output inversion through an inverting amplifier
because of the resistors’ tolerance errors. To generate a negative
reference, the reference can be level-shifted by an op amp such
that the VOUT and GND pins of the reference become the virtual
ground and 2.5 V, respectively, as shown in Figure 47.
04587-012
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
RFB
IOUT1
GND
–5V
+5V
ADR03
GND
VOUT
VIN
VREF
–2.5V
VDD
VDD = +5V
C1
VOUT = 0V TO +2.5V
Figure 47. Positive Output Voltage with Minimum Components
ADDING GAIN
In applications in which the output voltage is required to be
greater than VIN, gain can be added with an additional external
amplifier, or it can be achieved in a single stage. It is important
to consider the effect of the temperature coefficients of the
DAC’s thin film resistors. Simply placing a resistor in series
with the RFB resistor causes mismatches in the temperature
coefficients and results in larger gain temperature coefficient
errors. Instead, increase the gain of the circuit by using the
recommended configuration shown in Figure 48. R1, R2, and
R3 should have similar temperature coefficients, but they need
not match the temperature coefficients of the DAC. This
approach is recommended in circuits where gains greater than 1
are required.
04587-013
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
RFB
IOUT1
GND
R1
VREF
VIN
VDD
C1
VOUT
R3
R2
GAIN =
R2 + R3
R2
R1 =
R2R3
R2 + R3
Figure 48. Increasing Gain of Current-Output DAC
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| AD5450YUJZ-REEL7 | 功能描述:IC DAC 8BIT MULT 50MHZ TSOT23-8 RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:3,000 系列:nanoDAC™ 设置时间:80µs 位数:18 数据接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:带卷 (TR) 输出数目和类型:1 电压，单极 采样率（每秒）:- 产品目录页面:784 (CN2011-ZH PDF) 配用:EVAL-AD5680EBZ-ND - BOARD EVAL FOR AD5680 其它名称:AD5680BRJZ-2REEL7TR |
| AD5451 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5451YUJ | 制造商:Analog Devices 功能描述:DAC 1CH R-2R 10-BIT 8PIN TSOT - Bulk |
| AD5451YUJ-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 8-Pin TSOT T/R |
| AD5451YUJ-REEL7 | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 10-bit 8-Pin TSOT T/R 制造商:Rochester Electronics LLC 功能描述: |
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