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参数资料
| 型号： | AD573* |
| 英文描述： | 10-Bit A/D Converter |
| 中文描述： | 10位A / D转换器 |
| 文件页数： | 2/8页 |
| 文件大小： | 327K |
AD573–SPECIFICATIONS
(@ TA = +25 C, V+ = +5 V, V– = –12 V or –15 V, all voltages measured with respect
to digital common, unless otherwise noted.)
AD573J
AD573K
AD573S
Model
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
RESOLUTION
10
Bits
RELATIVE ACCURACY
1
1
1/2
1
LSB
TA = TMIN to TMAX
1
1/2
1
LSB
FULL-SCALE CALIBRATION
2
±2
2
LSB
UNIPOLAR OFFSET
1
1/2
1
LSB
BIPOLAR OFFSET
1
1/2
1
LSB
DIFFERENTIAL NONLINEARITY
3
10
Bits
TA = TMIN to TMAX
910
10
Bits
TEMPERATURE RANGE
0
+70
0
+70
–55
+125
°C
TEMPERATURE COEFFICIENTS
4
Unipolar Offset
2
1
2
LSB
Bipolar Offset
2
1
2
LSB
Full-Scale Calibration
2
4
2
5
LSB
POWER SUPPLY REJECTION
Positive Supply
+4.5 V
≤ V + ≤ +5.5 V
2
1
2
LSB
Negative Supply
–15.75 V
≤ V – ≤ –14.25 V
2
1
2
LSB
–12.6 V
≤ V – ≤ –11.4 V
2
1
2
LSB
ANALOG INPUT IMPEDANCE
3.0
5.0
7.0
3.0
5.0
7.0
3.0
5.0
7.0
k
ANALOG INPUT RANGES
Unipolar
0
+10
0
+10
0
+10
V
Bipolar
–5
+5
–5
+5
–5
+5
V
OUTPUT CODING
Unipolar
Positive True Binary
Bipolar
Positive True Offset Binary
LOGIC OUTPUT
Output Sink Current
(VOUT = 0.4 V max, TMIN to TMAX)
3.2
mA
Output Source Current
5
(VOUT = 2.4 V min, TMIN to TMAX)
0.5
mA
Output Leakage
40
A
LOGIC INPUTS
Input Current
100
A
Logic “1”
2.0
V
Logic “0”
0.8
V
CONVERSION TIME
TA = TMIN to TMAX
10
20
30
10
20
30
10
20
30
s
POWER SUPPLY
V+
+4.5
5.0
+7.0
+4.5
+5.0
+7.0
+4.5
+5.0
+7.0
V
V–
–11.4
–15
–16.5
+11.4
–15
–16.5
–11.4
–15
–16.5
V
OPERATING CURRENT
V+
15
20
15
20
15
20
mA
V–
9
15
9
15
9
15
mA
NOTES
1Relative accuracy is defined as the deviation of the code transition points from the ideal transfer point on a straight line from the zero to the full scale of the device.
2Full-scale calibration is guaranteed trimmable to zero with an external 50
potentiometer in place of the 15 fixed resistor. Full scale is defined as 10 volts minus
1 LSB, or 9.990 volts.
3Defined as the resolution for which no missing codes will occur.
4Change from +25
°C value from +25°C to T
MIN or TMAX.
5The data output lines have active pull-ups to source 0.5 mA. The DATA READY line is open collector with a nominal 6 k
internal pull-up resistor.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
REV. A
–2–
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