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参数资料
| 型号： | AD6622 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| 中文描述： | 4通道，75 MSPS的数字传输信号处理器判刑 |
| 文件页数： | 13/28页 |
| 文件大小： | 242K |
| 代理商： | AD6622 |
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AD6622
–13–
REV. 0
CASCASDED INTEGRATOR COMB (CIC)
INTERPOLATING FILTER
The I and Q outputs of the RCF stage are interpolated in inte-
ger factors by two cascaded integrator comb (CIC)
fi
lters. The
CIC section is separated into three discrete blocks: a
fi
fth order
fi
lter (CIC5), a second order
fi
lter (CIC2), and a scaling block
(CIC Scaling). The CIC5 and CIC2 blocks each exhibit a gain
that increases with respect to their interpolation factors, L
CIC5
and L
CIC2
. The product of these gains must be compensated for
in a shared CIC Scaling block.
2
–CIC_SCALE
L
CIC5
L
CIC2
CIC_SCALE
CIC5
CIC2
Figure 13. CIC Data Path
CIC Scaling
The CIC5 and CIC2 stages have a baseband gain of L
CIC54
×
L
CIC2
. The CIC scaling block is used to avoid numeric overflow
in the CIC stages. The CIC scale block reduces the signal level
without truncation or loss of resolution. The overall gain of the
CIC section is given by Equation 9.
CIC Gain
_
L
L
CIC
CIC
CIC
Scale
–
_
=
×
×
5
4
2
2
(9)
The value CIC_Scale may range from 0 to 25, and can be inde-
pendently programmed for each channel at Control Register
0x06. CIC_Scale may be safely calculated according Equation 10
to ensure the net gain through the CIC stages.
CIC Scale
_
The
ceil
function is the next highest integer. While this normally
constitutes a small loss, it can be recovered in the RCF scaling.
Likewise, if the RCF output level is known to be less than full
scale, the CIC gain can be increased by reducing CIC_Scale.
ceil
L
L
CIC
CIC
(log (
))
=
×
5
4
2
(10)
CIC5
The CIC5 is a
fi
fth order interpolating cascaded integrator comb
whose impulse response is completely de
fi
ned by its interpola-
tion factor, L
CIC5
. The value L
CIC5
–
1 can be independently
programmed for each channel at location 0x09. While this con-
trol register is 8-bits wide, L
CIC5
should be con
fi
ned to the range
from 1 to 32 to avoid the possibility of internal overflow for
full-scale inputs. The transfer function of the CIC5 is given
by the following equations with respect to the CIC5 output
sample rate, f
SAMP5
.
CIC( )
z
z
L
CIC
5
1
1
5
1
5
–
–
–
–
=
(11)
This polynomial fraction can be completely reduced as follows,
demonstrating a
fi
nite impulse response with perfect phase lin-
earity for all values of
L
CIC5
.
CIC
z
z
z
e
k
k
L
k
L
j
k
L
∑
∑
CIC
5
0
5
1
1
2
5
51
–
51
–
5
( )
=
=
=
=
π
(12)
The frequency response of the CIC5 can be expressed as follows.
The initial 1/L
CIC5
factor normalizes for the increased rate, which is
appropriate when the samples are destined for a DAC with a
zero order hold output. The maximum gain is (L
CIC5
)
4
at base-
band, but internal registers peak in response to various dynamic
inputs. As long as L
CIC5
is con
fi
ned to 32 or less, there is no
possibility of overflow at any register.
CIC
f
L
L
f
f
f
L
CIC
CIC
CIC
CIC
5
1
5
5
5
5
5
( )
sin
sin
=
×
π
π
(13)
As an example, we will consider an input from the RCF whose
bandwidth is 0.141 of the RCF output rate, centered at base-
band. Interpolation by a factor of
fi
ve reveals
fi
ve images, as
shown in Figure 14.
–
150
–
2
–
1
d
0
1
2
–
130
–
110
–
90
–
70
–
50
–
30
–
10
10
Figure 14. Unfiltered CIC Interpolation Image
The CIC5 rejects each of the undesired images while passing
the image at baseband. The images of a pure tone at channel
center (dc) are nulled perfectly, but as the bandwidth increases
the rejection is diminished. The lower band edge of the
fi
rst
image always has the least rejection. In this example, the CIC5
is interpolating by a factor of
fi
ve and the input signal has a band-
width of 0.141 of the RCF output sample rate. The plot below
shows
–
110 dBc rejection of the lower band edge of the
fi
rst
image. All other image frequencies have better rejection.
–
150
–
2
–
1
d
0
1
2
–
130
–
110
–
90
–
70
–
50
–
30
–
10
10
Figure 15. Filtered CIC5 Interpolation Images
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PDF描述 |
|---|---|
| AD6623 | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| AD6623ABC | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| AD6623AS | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| AD6623PCB | 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP |
| AD6624AS | Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6622AS | 制造商:Analog Devices 功能描述:Transmit Signal Processor 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL 65 MSPS DIGITAL UPCONVERTER - Bulk |
| AD6622PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622S | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622S/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6623 | 制造商:Analog Devices 功能描述: |
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