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参数资料
型号： AD6623
厂商： Analog Devices, Inc.
英文描述： 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
中文描述： 4通道，104 MSPS的数字传输信号处理器判刑
文件页数： 24/40页
文件大小： 381K
代理商： AD6623
REV. 0
AD6623
–24–
L
rCIC2
–
1 should be confined to the ranges shown
by Table XIII
according to the interpolation factor of the CIC5.
Exceeding the
recommended guidelines may result in overflow for input sequences
at or near full scale. While relatively large ratios
of L
rCIC2
/M
rCIC2
allow for the larger overall interpolations with minimal power
consumption, L
rCIC2
/M
rCIC2
should be minimized to achieve the
best overall image rejection.
As an example, consider an input from the CIC5 whose bandwidth
is 0.0033 of the CIC5 rate, centered at baseband.
Interpolation
by a factor of five reveals five images, as shown below.
–
150
–
2
–
1
d
0
1
2
–
130
–
110
–
90
–
70
–
50
–
30
–
10
10
Figure 29. CIC5 Interpolation Images
The rCIC2 rejects each of the undesired images while passing
the image at baseband. The images of a pure tone at channel
center (DC) are nulled perfectly, but as the bandwidth increases
the rejection is diminished. The lower band edge of the first
image always has the least rejection. In this example, the rCIC2
is interpolating by a factor of five and the input signal has a
bandwidth of 0.0033 of the CIC5 output sample rate. Figure 30
below shows
–
110 dBc rejection of the lower band edge of the
first image. All other image frequencies have better rejection.
10
d
–
10
–
30
–
3
3
–
2
–
1
0
1
2
–
50
–
70
–
90
–
110
–
130
–
150
Figure 30. rCIC2 –110 dBc
Table XIV lists maximum bandwidth that will be rejected to
various levels for CIC2
interpolation factors from 1 to 32. The
example above corresponds to the listing in the
–
110 dB column
and the L
CIC2
= 5 row. The rejection of the CIC2 improves as
the interpolation factor increases.
Table XIV. Maximum Bandwidth of Rejection for L
CIC2
Values
–110 dB
–100 dB
–90 dB
–80 dB
–70 dB
Full
0.0023
0.0029
0.0032
0.0033
0.0034
0.0034
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
0.0035
Full
0.0040
0.0052
0.0057
0.0059
0.0060
0.0061
0.0062
0.0062
0.0062
0.0062
0.0062
0.0062
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
0.0063
Full
0.0072
0.0093
0.0101
0.0105
0.0107
0.0108
0.0109
0.0110
0.0110
0.0110
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0111
0.0112
0.0112
0.0112
0.0112
0.0112
0.0112
0.0112
0.0112
0.0112
Full
0.0127
0.0165
0.0179
0.0186
0.0189
0.0192
0.0193
0.0194
0.0195
0.0195
0.0196
0.0196
0.0196
0.0197
0.0197
0.0197
0.0197
0.0197
0.0197
0.0197
0.0197
0.0197
0.0197
0.0198
0.0198
0.0198
0.0198
0.0198
0.0198
0.0198
0.0198
Full
0.0226
0.0292
0.0316
0.0328
0.0334
0.0338
0.0341
0.0343
0.0344
0.0345
0.0346
0.0346
0.0347
0.0347
0.0347
0.0348
0.0348
0.0348
0.0348
0.0348
0.0348
0.0348
0.0348
0.0349
0.0349
0.0349
0.0349
0.0349
0.0349
0.0349
0.0349
NUMERICALLY CONTROLLED OSCILLATOR/TUNER
(NCO)
Each channel has a fully independent tuner. The tuner accepts
data from the CIC filter, tunes it to a digital Intermediate Fre-
quency (IF), and passes the result to a shared summation block.
The tuner consists of a 32-bit quadrature NCO and a Quadrature
Amplitude Mixer (QAM). The NCO serves as a local oscillator and
the QAM translates the interpolated channel data from baseband
to the NCO frequency. The worst case spurious signal from the
NCO is better than
–
100 dBc for all output frequencies. The
tuner can produce real or complex outputs as requested by the
shared summation block.
In the complex mode, the NCO serves as a quadrature local oscil
lator
running at f
CLK
/2 capable of producing any frequency step between
–
f
CLK
/4 and +f
CLK
/4 with a resolution of f
CLK
/2
33
(0.0121 Hz for
f
CLK
= 104 MHz).
In the real mode, the NCO serves as a quadrature local oscillator
running at f
CLK
capable of producing any frequency step between
–
f
CLK
/2 and +f
CLK
/2 with a resolution of f
CLK
/2
32
(0.0242 Hz for
f
CLK
= 104 MHz). The quadrature portion of the output is
discarded. Negative frequencies are distinguished from positive
相关PDF资料
PDF描述
AD6623ABC 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6623AS 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6623PCB 4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
AD6624AS Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP)
AD6624A Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP)
相关代理商/技术参数
参数描述
AD6623ABC 制造商:Analog Devices 功能描述:Signal Processor 196-Pin CSP-BGA 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL, 104 MSPS DIGITAL TSP - Bulk
AD6623ABCZ 制造商:Analog Devices 功能描述:Signal Processor 196-Pin CSP-BGA
AD6623AS 制造商:Analog Devices 功能描述:Signal Processor 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:4 CHANNEL, 104 MSPS DIGITAL TSP - Bulk
AD6623ASZ 功能描述:IC TSP 4CHAN 104MSPS 128MQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1
AD6623BC/PCB 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 104 MSPS Digital Transmit Signal Processor TSP
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