AD669
REV. A
–4–
ORDERING GUIDE
Linearity
Gain
Temperature
Error Max
TC max
Package
Model
Range
TMIN–TMAX
ppm/ C
Description
Option*
AD669AN
–40
°C to +85°C
±4 LSB
25
Plastic DIP
N-28
AD669AR
–40
°C to +85°C
±4 LSB
25
SOIC
R-28
AD669BN
–40
°C to +85°C
±2 LSB
15
Plastic DIP
N-28
AD669BR
–40
°C to +85°C
±2 LSB
15
SOIC
R-28
AD669AQ
–40
°C to +85°C
±4 LSB
15
Cerdip
Q-28
AD669BQ
–40
°C to +85°C
±2 LSB
15
Cerdip
Q-28
AD669SQ
–55
°C to +125°C ±4 LSB
15
Cerdip
Q-28
AD669/883B**
–55
°C to +125°C**
**
** N = Plastic DIP; Q = Cerdip; R = SOIC.
** Refer to AD669/883B military data sheet.
ESD SENSITIVITY
The AD669 features input protection circuitry consisting of large transistors and polysilicon series
resistors to dissipate both high-energy discharges (Human Body Model) and fast, low-energy pulses
(Charged Device Model). Per Method 3015.2 of MIL-STD-883: C, the AD669 has been classified
as a Class 2 device.
Proper ESD precautions are strongly recommended to avoid functional damage or performance
degradation. Charges as high as 4000 volts readily accumulate on the human body and test
equipment and discharge without detection. Unused devices must be stored in conductive foam or
shunts, and the foam should be discharged to the destination socket before devices are removed.
For further information on ESD precautions, refer to Analog Devices’ ESD Prevention Manual.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
*
VCC to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +17.0 V
VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –17.0 V
VLL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±1 V
Digital Inputs (Pins 5 through 23) to DGND . . . . . . –1.0 V to
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0 V
REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±10.5 V
Span/Bipolar Offset to AGND . . . . . . . . . . . . . . . . . . .
±10.5 V
REF OUT, VOUT . . . . . . Indefinite Short To AGND, DGND,
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC, VEE, and VLL
Power Dissipation (Any Package)
To +60
°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
Derates above +60
°C . . . . . . . . . . . . . . . . . . . . . .8.7 mW/°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300
°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only, and functional
operation of the device at these or any other conditions above those indi cated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PIN CONFIGURATION
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DGND
V
EE
V
CC
V
LL
CS
L1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TOP VIEW
(Not to Scale)
DB7
DB6
DB5
DB4
DB3
DB2
AGND
LDAC
DB0
DB1
AD669
REF OUT
REF IN
VOUT
SPAN/BIP
OFFSET
THD
+
N
–
%
TEMPERATURE –
°C
10
0.001
125
0.01
–25
–50
0.1
1
100
75
50
25
0
–60dB
–20dB
0dB
THD+N vs. Temperature
FREQUENCY – Hz
THD
+
N
–
%
10
0.001
0.01
0.1
1
100
10000
1000
–60dB
–20dB
0dB
THD+N vs. Frequency