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参数资料
| 型号： | AD7266BSUZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/29页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 3CHAN 2MSPS 32TQFP |
| 设计资源： | AD7266 SAR ADC in DC-Coupled Differential and Single-Ended Appls (CN0039) |
| 标准包装： | 500 |
| 位数： | 12 |
| 采样率（每秒）： | 2M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 33.6mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 12 个单端，单极；6 个差分，单极；6 个伪差分，单极 |
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AD7266
Rev. B | Page 18 of 28
TRANSFER FUNCTIONS
The designed code transitions occur at successive integer LSB
values (1 LSB, 2 LSB, and so on). In single-ended mode, the LSB
size is VREF/4096 when the 0 V to VREF range is used, and the
LSB size is 2 × VREF/4096 when the 0 V to 2 × VREF range is used.
In differential mode, the LSB size is 2 × VREF /4096 when the 0 V
to VREF range is used, and the LSB size is 4 × VREF/4096 when the
0 V to 2 × VREF range is used. The ideal transfer characteristic
for the AD7266 when straight binary coding is output is shown
in Figure 32, and the ideal transfer characteristic for the
AD7266 when twos complement coding is output is shown in
04603-027
000...000
111...111
1LSB = VREF/4096
1LSB
VREF – 1LSB
ANALOG INPUT
ADC
CODE
0V
000...001
000...010
111...110
111...000
011...111
NOTE
1. VREF IS EITHER VREF OR 2 × VREF.
Figure 32. Straight Binary Transfer Characteristic
04603-028
100...000
011...111
1LSB = 2
× VREF/4096
+VREF – 1 LSB
–VREF + 1LSB VREF – 1LSB
ANALOG INPUT
ADC
CODE
100...001
100...010
011...110
000...001
000...000
111...111
Figure 33. Twos Complement Transfer Characteristic with
VREF ± VREF Input Range
DIGITAL INPUTS
The digital inputs applied to the AD7266 are not limited by the
maximum ratings that limit the analog inputs. Instead, the
digital inputs can be applied up to 7 V and are not restricted by
Maximum Ratings section for more information. Another
advantage of the SCLK, RANGE, A0 to A2, and CS pins not
being restricted by the VDD + 0.3 V limit is that power supply
sequencing issues are avoided. If one of these digital inputs is
applied before VDD, there is no risk of latch-up, as there would
be on the analog inputs if a signal greater than 0.3 V were
applied prior to VDD.
VDRIVE
The AD7266 also has a VDRIVE feature to control the voltage at
which the serial interface operates. VDRIVE allows the ADC to
easily interface to both 3 V and 5 V processors. For example, if
the AD7266 was operated with a VDD of 5 V, the VDRIVE pin
could be powered from a 3 V supply, allowing a large dynamic
range with low voltage digital processors. Therefore, the
AD7266 could be used with the 2 × VREF input range, with a VDD
of 5 V while still being able to interface to 3 V digital parts.
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