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参数资料
| 型号： | AD7346B |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 2 Pair/1 Pair ETSI Compatible HDSL Analog Front End |
| 中文描述： | 2对/ 1对ETSI兼容HDSL模拟前端 |
| 文件页数： | 1/8页 |
| 文件大小： | 93K |
| 代理商： | AD7346B |
REV PrA
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Prelimnary Technical Data
2 Pair/1 Pair ETSI Compatible
HDSL Analog Front End
AD5011
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: hppt://www.analog.com
Fax: 781/326-8703
FEATURES
Integrated front End for Single Pair or Two Pair HDSL
Systems
Meets ETSI Specifications
Supports 1168 kbps and 2.32 Mbps
Programmable Filtering Supports Adaptive HDSL
Transmit and Receive Signal Path Functions
Receive Hybrid Amplifier, PGA, ADC and Adaptable
Filter
Transmit DAC, Adaptable Filter and Differential
Outputs
Normal Loopback
Serial Interface to Digital Transceivers
Single 3 V Power Supply
FUNCT IONAL BLOCK DIAGRAM
GENERAL DESCRIPT ION
T he AD5011 is an analog front end for two pair or single
pair HDSL applications that use 1168 kbps or 2.32 Mbps
data rates. T he device integrates all the transmit and receive
functional blocks. A standard serial interface is used to
communicate with the DAC and ADC. T he filters in both
the transmit and receive paths are programmable which
allows adaptive HDSL to be performed also. T he part is
available in a 48-pin LQFP package and is specified for a
temperature range of -40
o
C to +85
o
C.
14-Bit DAC
6 Pole Adaptive
Bessel Filter
PGA
Line
Driver
Hybrid
PGA
4 Pole Adaptive
Butterworth Filter
ADC
Buffer
12-Bit ADC
SPI
SPICLK
TFS
DT
DR
RESETB
PW RDOWNB
TxDATA
TxSYNC
TxCLK
ADCCLK
SCLK
SDO
DR
CAP-T
CAP-B
REF-COM
VREF
Tx-DECOUP
DRV-OUTP
HYBIN-2B
HYBIN-2A
HYBIN-1A
HYBIN-1B
A
A
F
F
0 dB
-6 dB
-6 dB
-3 dB
0 dB
+3 dB
+6 dB
DRV-OUTN
VDRIVE
CM-LVL
Control/
Configuration
PRELIMINARY TECHNICAL DATA
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| AD734AQ | 功能描述:IC MULTIPLIER/DIVIDER 14CDIP RoHS:否 类别:集成电路 (IC) >> 线性 - 模拟乘法器，除法器 系列:- 标准包装:25 系列:HA 功能:模拟乘法器 位元/级数:四象限 封装/外壳:16-CDIP（0.300"，7.62mm） 供应商设备封装:16-CDIP 侧面铜焊 包装:管件 |
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| AD734BN | 功能描述:IC MULTIPLIER/DIVIDER 14-DIP RoHS:否 类别:集成电路 (IC) >> 线性 - 模拟乘法器，除法器 系列:- 标准包装:25 系列:HA 功能:模拟乘法器 位元/级数:四象限 封装/外壳:16-CDIP（0.300"，7.62mm） 供应商设备封装:16-CDIP 侧面铜焊 包装:管件 |
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