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参数资料
| 型号： | AD7475ARZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/25页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SERIAL LP 8SOIC |
| 标准包装： | 98 |
| 位数： | 12 |
| 采样率（每秒）： | 1M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 10.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，单极 |
AD7475/AD7495
Rev. B | Page 15 of 24
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases and performance degrades.
Figure 16 shows a graph of the total harmonic distortion vs.
source impedance for various analog input frequencies.
SOURCE IMPEDANCE (
Ω)
–90
THD
(dB)
1
100
–80
–70
–60
–50
10000
–40
fIN = 500kHz
fIN = 10kHz
fIN = 100kHz
fIN = 200kHz
10
1000
–30
–20
–10
01684-B
-016
Figure 16. THD vs. Source Impedance for Various Analog Input Frequencies
Figure 17 shows a graph of total harmonic distortion vs. analog
input frequency for various supply voltages while sampling at
1 MSPS with an SCLK of 20 MHz.
INPUT FREQUENCY (kHz)
THD
(dB)
10
100
–95
–93
–91
–87
1000
–85
VDD = VDRIVE = 3.60V
VDD = VDRIVE = 2.70V
VDD = VDRIVE = 5.25V
VDD = VDRIVE = 4.75V
–83
–81
–79
–77
–75
–89
01684-B-017
Figure 17. THD vs. Analog Input Frequency for Various Supply Voltages
Digital Inputs
The digital inputs applied to the AD7475/AD7495 are not
limited by the maximum ratings, which limit the analog inputs.
Instead, the digital inputs applied can go to 7 V and are not
restricted by the VDD + 0.3 V limit as on the analog inputs.
Another advantage of SCLK and CS not being restricted by the
VDD + 0.3 V limit is that power supply sequencing issues are
avoided. If CS or SCLK are applied before VDD, there is no risk
of latch-up as there would be on the analog inputs if a signal
greater than 0.3 V were applied prior to VDD.
VDRIVE
The AD7475/AD7495 also has the VDRIVE feature. This feature
controls the voltage at which the serial interface operates. VDRIVE
allows the ADC to easily interface to both 3 V and 5 V
processors.
For example, if the AD7475/AD7495 were operated with a VDD
of 5 V, the VDRIVE pin could be powered from a 3 V supply. The
AD7475/AD7495 have better dynamic performance with a VDD
of 5 V, while still being able to interface to 3 V digital parts.
Care should be taken to ensure VDRIVE does not exceed VDD by
more than 0.3 V. (See the Absolute Maximum Ratings section.)
Reference Section
An external reference source should be used to supply the 2.5 V
reference to the AD7475. Errors in the reference source result
in gain errors in the AD7475 transfer function and add the
specified full-scale errors on the part. The AD7475 voltage
reference input, REF IN, has a dynamic input impedance. A
small dynamic current is required to charge the capacitors in
the capacitive DAC during the bit trials. This current is typically
50 μA for a 2.5 V reference. A capacitor of at least 0.1 μF should
be placed on the REF IN pin. Suitable reference sources for the
AD7475 are the AD780, AD680, AD1582, ADR391, ADR381,
ADR431, and ADR03.
The AD7495 contains an on-chip 2.5 V reference. As shown in
Figure 18, the voltage that appears at the REF OUT pin is
internally buffered before being applied to the ADC; the output
impedance of this buffer is typically 10 Ω. The reference is
capable of sourcing up to 2 mA. The REF OUT pin should be
decoupled to AGND using a 100 nF or greater capacitor.
If the 2.5 V internal reference is used to drive another device
that is capable of glitching the reference at critical times, then
the reference has to be buffered before driving the device. To
ensure optimum performance of the AD7495, it is recom-
mended that the internal reference not be over driven. If an
ADC with external reference capability is required, the AD7475
should be used.
V
REF OUT
25
Ω
40k
Ω
160k
Ω
01684-B
-018
Figure 18. AD7495 Reference Circuit
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